From 94b31eb4f4cf7f56801c9706d4831d2a100a2850 Mon Sep 17 00:00:00 2001 From: JosJuice Date: Sun, 27 Aug 2023 12:04:18 +0200 Subject: [PATCH] Jit: Replace MSR/MMCR access with feature_flags access This has the same effect in the end, but in my opinion, doing it this way makes it more clear for the reader why we can read from ppcState at JIT time, something that makes no sense for everything else in ppcState. --- Source/Core/Core/PowerPC/Jit64/Jit.cpp | 2 +- Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp | 6 +++--- Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp | 4 ++-- Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp | 6 ++++-- Source/Core/Core/PowerPC/JitArm64/Jit.cpp | 2 +- Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp | 4 ++-- .../Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp | 6 ++++-- 7 files changed, 17 insertions(+), 13 deletions(-) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/PowerPC/Jit64/Jit.cpp index a6881c1172..5938080b0e 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit.cpp @@ -445,7 +445,7 @@ bool Jit64::Cleanup() did_something = true; } - if (MMCR0(m_ppc_state).Hex || MMCR1(m_ppc_state).Hex) + if (m_ppc_state.feature_flags & FEATURE_FLAG_PERFMON) { ABI_PushRegistersAndAdjustStack({}, 0); ABI_CallFunctionCCCP(PowerPC::UpdatePerformanceMonitor, js.downcountAmount, js.numLoadStoreInst, diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp index 7a7461713e..3f6c69624a 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp @@ -320,7 +320,7 @@ void Jit64::dcbx(UGeckoInstruction inst) FixupBranch bat_lookup_failed; MOV(32, R(effective_address), R(addr)); const u8* loop_start = GetCodePtr(); - if (m_ppc_state.msr.IR) + if (m_ppc_state.feature_flags & FEATURE_FLAG_MSR_IR) { // Translate effective address to physical address. bat_lookup_failed = BATAddressLookup(addr, tmp, m_jit.m_mmu.GetIBATTable().data()); @@ -349,7 +349,7 @@ void Jit64::dcbx(UGeckoInstruction inst) SwitchToFarCode(); SetJumpTarget(invalidate_needed); - if (m_ppc_state.msr.IR) + if (m_ppc_state.feature_flags & FEATURE_FLAG_MSR_IR) SetJumpTarget(bat_lookup_failed); BitSet32 registersInUse = CallerSavedRegistersInUse(); @@ -421,7 +421,7 @@ void Jit64::dcbz(UGeckoInstruction inst) end_dcbz_hack = J_CC(CC_L); } - bool emit_fast_path = m_ppc_state.msr.DR && m_jit.jo.fastmem_arena; + bool emit_fast_path = (m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR) && m_jit.jo.fastmem_arena; if (emit_fast_path) { diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp index 41d999631b..91865b61a0 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp @@ -23,7 +23,7 @@ void Jit64::psq_stXX(UGeckoInstruction inst) JITDISABLE(bJITLoadStorePairedOff); // For performance, the AsmCommon routines assume address translation is on. - FALLBACK_IF(!m_ppc_state.msr.DR); + FALLBACK_IF(!(m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR)); s32 offset = inst.SIMM_12; bool indexed = inst.OPCD == 4; @@ -112,7 +112,7 @@ void Jit64::psq_lXX(UGeckoInstruction inst) JITDISABLE(bJITLoadStorePairedOff); // For performance, the AsmCommon routines assume address translation is on. - FALLBACK_IF(!m_ppc_state.msr.DR); + FALLBACK_IF(!(m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR)); s32 offset = inst.SIMM_12; bool indexed = inst.OPCD == 4; diff --git a/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp b/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp index 5e3e12f9dd..33bb028bf4 100644 --- a/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp +++ b/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp @@ -371,7 +371,8 @@ void EmuCodeBlock::SafeLoadToReg(X64Reg reg_value, const Gen::OpArg& opAddress, } FixupBranch exit; - const bool dr_set = (flags & SAFE_LOADSTORE_DR_ON) || m_jit.m_ppc_state.msr.DR; + const bool dr_set = + (flags & SAFE_LOADSTORE_DR_ON) || (m_jit.m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR); const bool fast_check_address = !force_slow_access && dr_set && m_jit.jo.fastmem_arena && !m_jit.m_ppc_state.m_enable_dcache; if (fast_check_address) @@ -544,7 +545,8 @@ void EmuCodeBlock::SafeWriteRegToReg(OpArg reg_value, X64Reg reg_addr, int acces } FixupBranch exit; - const bool dr_set = (flags & SAFE_LOADSTORE_DR_ON) || m_jit.m_ppc_state.msr.DR; + const bool dr_set = + (flags & SAFE_LOADSTORE_DR_ON) || (m_jit.m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR); const bool fast_check_address = !force_slow_access && dr_set && m_jit.jo.fastmem_arena && !m_jit.m_ppc_state.m_enable_dcache; if (fast_check_address) diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.cpp b/Source/Core/Core/PowerPC/JitArm64/Jit.cpp index 9474805972..2f5bd660f8 100644 --- a/Source/Core/Core/PowerPC/JitArm64/Jit.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/Jit.cpp @@ -276,7 +276,7 @@ void JitArm64::Cleanup() SetJumpTarget(exit); } - if (MMCR0(m_ppc_state).Hex || MMCR1(m_ppc_state).Hex) + if (m_ppc_state.feature_flags & FEATURE_FLAG_PERFMON) { ABI_CallFunction(&PowerPC::UpdatePerformanceMonitor, js.downcountAmount, js.numLoadStoreInst, js.numFloatingPointInst, &m_ppc_state); diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp index 75c6fe884b..b9c8c77324 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp @@ -727,7 +727,7 @@ void JitArm64::dcbx(UGeckoInstruction inst) // Translate effective address to physical address. const u8* loop_start = GetCodePtr(); FixupBranch bat_lookup_failed; - if (m_ppc_state.msr.IR) + if (m_ppc_state.feature_flags & FEATURE_FLAG_MSR_IR) { bat_lookup_failed = BATAddressLookup(physical_addr, effective_addr, WA, m_mmu.GetIBATTable().data()); @@ -756,7 +756,7 @@ void JitArm64::dcbx(UGeckoInstruction inst) SwitchToFarCode(); SetJumpTarget(invalidate_needed); - if (m_ppc_state.msr.IR) + if (m_ppc_state.feature_flags & FEATURE_FLAG_MSR_IR) SetJumpTarget(bat_lookup_failed); BitSet32 gprs_to_push = gpr.GetCallerSavedUsed(); diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp index 00810502a5..37df58e921 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp @@ -23,7 +23,8 @@ void JitArm64::psq_lXX(UGeckoInstruction inst) JITDISABLE(bJITLoadStorePairedOff); // If fastmem is enabled, the asm routines assume address translation is on. - FALLBACK_IF(!js.assumeNoPairedQuantize && jo.fastmem && !m_ppc_state.msr.DR); + FALLBACK_IF(!js.assumeNoPairedQuantize && jo.fastmem && + !(m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR)); // X30 is LR // X0 is the address @@ -153,7 +154,8 @@ void JitArm64::psq_stXX(UGeckoInstruction inst) JITDISABLE(bJITLoadStorePairedOff); // If fastmem is enabled, the asm routines assume address translation is on. - FALLBACK_IF(!js.assumeNoPairedQuantize && jo.fastmem && !m_ppc_state.msr.DR); + FALLBACK_IF(!js.assumeNoPairedQuantize && jo.fastmem && + !(m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR)); // X30 is LR // X0 contains the scale