DSPLLE Take 2 in getting rid of exception hack.

This time zelda seems to work and mails seems to pass between CPU and SPU
Very similar to the ones from HLE 


git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3680 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
nakeee
2009-07-05 13:07:38 +00:00
parent df3abc6a2a
commit 96429cf752
4 changed files with 71 additions and 26 deletions

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@ -145,6 +145,7 @@ void DSPCore_Reset()
g_dsp.r[DSP_REG_WR1] = 0xffff; g_dsp.r[DSP_REG_WR1] = 0xffff;
g_dsp.r[DSP_REG_WR2] = 0xffff; g_dsp.r[DSP_REG_WR2] = 0xffff;
g_dsp.r[DSP_REG_WR3] = 0xffff; g_dsp.r[DSP_REG_WR3] = 0xffff;
} }
void DSPCore_SetException(u8 level) void DSPCore_SetException(u8 level)
@ -157,8 +158,14 @@ void DSPCore_CheckExternalInterrupt()
// check if there is an external interrupt // check if there is an external interrupt
if (g_dsp.cr & CR_EXTERNAL_INT) if (g_dsp.cr & CR_EXTERNAL_INT)
{ {
if (dsp_SR_is_flag_set(SR_EXT_INT_ENABLE) && (g_dsp.exception_in_progress_hack == false)) #ifdef DEBUG_EXP
NOTICE_LOG(DSPLLE, "trying External interupt fired");
#endif
if (dsp_SR_is_flag_set(SR_EXT_INT_ENABLE))
{ {
#ifdef DEBUG_EXP
NOTICE_LOG(DSPLLE, "External interupt fired");
#endif
// level 7 is the interrupt exception // level 7 is the interrupt exception
DSPCore_SetException(EXP_INT); DSPCore_SetException(EXP_INT);
@ -167,25 +174,30 @@ void DSPCore_CheckExternalInterrupt()
} }
} }
void DSPCore_CheckExceptions() void DSPCore_CheckExceptions()
{ {
// check exceptions if (g_dsp.exceptions != 0) {
if ((g_dsp.exceptions != 0) && (!g_dsp.exception_in_progress_hack)) #ifdef DEBUG_EXP
{ NOTICE_LOG(DSPLLE, "trying exception %d fired", g_dsp.exceptions);
for (int i = 0; i < 8; i++) #endif
{ // check exceptions
if (g_dsp.exceptions & (1 << i)) for (int i = 0; i < 8; i++) {
{ // Seems 7 must pass or zelda dies
_assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "assert while exception"); if (dsp_SR_is_flag_set(SR_INT_ENABLE) || i == EXP_INT) {
if (g_dsp.exceptions & (1 << i)) {
dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc); _assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "assert while exception");
dsp_reg_store_stack(DSP_STACK_D, g_dsp.r[DSP_REG_SR]);
dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc);
g_dsp.pc = i * 2; dsp_reg_store_stack(DSP_STACK_D, g_dsp.r[DSP_REG_SR]);
g_dsp.exceptions &= ~(1 << i);
g_dsp.pc = i * 2;
g_dsp.exception_in_progress_hack = true; g_dsp.exceptions &= ~(1 << i);
break; #ifdef DEBUG_EXP
NOTICE_LOG(DSPLLE, "exception %d fired");
#endif
g_dsp.exception_in_progress_hack = true;
break;
}
} }
} }
} }

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@ -87,12 +87,19 @@ void gdsp_mbox_write_l(u8 mbx, u16 val)
if (DSPHost_OnThread()) if (DSPHost_OnThread())
g_CriticalSection.Leave(); g_CriticalSection.Leave();
#ifdef DEBUG_EXP
if (mbx == GDSP_MBOX_DSP) if (mbx == GDSP_MBOX_DSP)
{ {
DEBUG_LOG(DSPLLE, " - DSP writes mail to mbx %i: 0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.pc); NOTICE_LOG(DSPLLE, " - DSP writes mail to mbx low %i: 0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.pc);
//DSPHost_InterruptRequest();
//DSPCore_SetException(EXP_INT);
} else { } else {
// Trigger exception? NOTICE_LOG(DSPLLE, " - CPU writes mail to mbx low %i: 0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_CPU), g_dsp.pc);
// DSPHost_InterruptRequest();
// DSPCore_SetException(EXP_INT);
} }
#endif
} }
@ -110,10 +117,23 @@ u16 gdsp_mbox_read_l(u8 mbx)
u16 val = gdsp_mbox[mbx][1]; u16 val = gdsp_mbox[mbx][1];
gdsp_mbox[mbx][0] &= ~0x8000; gdsp_mbox[mbx][0] &= ~0x8000;
DEBUG_LOG(DSPLLE, "- DSP reads mail from mbx %i: %08x (pc=0x%04x)", mbx, gdsp_mbox_peek(mbx), g_dsp.pc);
if (DSPHost_OnThread()) if (DSPHost_OnThread())
g_CriticalSection.Leave(); g_CriticalSection.Leave();
#ifdef DEBUG_EXP
if (mbx == GDSP_MBOX_DSP)
{
NOTICE_LOG(DSPLLE, "- DSP reads mail from mbx %i: %08x (pc=0x%04x)", mbx, gdsp_mbox_peek(mbx), g_dsp.pc);
// DSPCore_SetException(EXP_INT);
// DSPHost_InterruptRequest();
} else {
NOTICE_LOG(DSPLLE, "- CPU reads mail from mbx %i: %08x (pc=0x%04x)", mbx, gdsp_mbox_peek(mbx), g_dsp.pc);
// DSPCore_SetException(EXP_INT);
// DSPHost_InterruptRequest();
}
#endif
return val; return val;
} }
@ -135,6 +155,12 @@ void gdsp_ifx_write(u16 addr, u16 val)
gdsp_mbox_write_l(GDSP_MBOX_DSP, val); gdsp_mbox_write_l(GDSP_MBOX_DSP, val);
break; break;
case 0xfe: // CMBH
return gdsp_mbox_write_h(GDSP_MBOX_CPU, val);
case 0xff: // CMBL
return gdsp_mbox_write_l(GDSP_MBOX_CPU, val);
case 0xcb: // DSBL case 0xcb: // DSBL
gdsp_ifx_regs[addr & 0xFF] = val; gdsp_ifx_regs[addr & 0xFF] = val;
gdsp_do_dma(); gdsp_do_dma();
@ -159,14 +185,14 @@ void gdsp_ifx_write(u16 addr, u16 val)
default: default:
if ((addr & 0xff) >= 0xa0) { if ((addr & 0xff) >= 0xa0) {
if (pdlabels[(addr & 0xFF) - 0xa0].name && pdlabels[(addr & 0xFF) - 0xa0].description) { if (pdlabels[(addr & 0xFF) - 0xa0].name && pdlabels[(addr & 0xFF) - 0xa0].description) {
INFO_LOG(DSPLLE, "%04x MW %s (%04x)\n", g_dsp.pc, pdlabels[(addr & 0xFF) - 0xa0].name, val); WARN_LOG(DSPLLE, "%04x MW %s (%04x)", g_dsp.pc, pdlabels[(addr & 0xFF) - 0xa0].name, val);
} }
else { else {
ERROR_LOG(DSPLLE, "%04x MW %04x (%04x)\n", g_dsp.pc, addr, val); ERROR_LOG(DSPLLE, "%04x MW %04x (%04x)", g_dsp.pc, addr, val);
} }
} }
else { else {
ERROR_LOG(DSPLLE, "%04x MW %04x (%04x)\n", g_dsp.pc, addr, val); ERROR_LOG(DSPLLE, "%04x MW %04x (%04x)", g_dsp.pc, addr, val);
} }
gdsp_ifx_regs[addr & 0xFF] = val; gdsp_ifx_regs[addr & 0xFF] = val;
break; break;
@ -180,6 +206,9 @@ u16 gdsp_ifx_read(u16 addr)
case 0xfc: // DMBH case 0xfc: // DMBH
return gdsp_mbox_read_h(GDSP_MBOX_DSP); return gdsp_mbox_read_h(GDSP_MBOX_DSP);
case 0xfd: // DMBL
return gdsp_mbox_read_l(GDSP_MBOX_DSP);
case 0xfe: // CMBH case 0xfe: // CMBH
return gdsp_mbox_read_h(GDSP_MBOX_CPU); return gdsp_mbox_read_h(GDSP_MBOX_CPU);
@ -199,7 +228,7 @@ u16 gdsp_ifx_read(u16 addr)
default: default:
if ((addr & 0xff) >= 0xa0) { if ((addr & 0xff) >= 0xa0) {
if (pdlabels[(addr & 0xFF) - 0xa0].name && pdlabels[(addr & 0xFF) - 0xa0].description) { if (pdlabels[(addr & 0xFF) - 0xa0].name && pdlabels[(addr & 0xFF) - 0xa0].description) {
INFO_LOG(DSPLLE, "%04x MR %s (%04x)\n", g_dsp.pc, pdlabels[(addr & 0xFF) - 0xa0].name, gdsp_ifx_regs[addr & 0xFF]); NOTICE_LOG(DSPLLE, "%04x MR %s (%04x)\n", g_dsp.pc, pdlabels[(addr & 0xFF) - 0xa0].name, gdsp_ifx_regs[addr & 0xFF]);
} }
else { else {
ERROR_LOG(DSPLLE, "%04x MR %04x (%04x)\n", g_dsp.pc, addr, gdsp_ifx_regs[addr & 0xFF]); ERROR_LOG(DSPLLE, "%04x MR %04x (%04x)\n", g_dsp.pc, addr, gdsp_ifx_regs[addr & 0xFF]);

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@ -22,6 +22,7 @@
// emulation core can access the environment it runs in. If the emulation // emulation core can access the environment it runs in. If the emulation
// core isn't used, for example in an asm/disasm tool, then most of these // core isn't used, for example in an asm/disasm tool, then most of these
// can be stubbed out. // can be stubbed out.
//#define DEBUG_EXP 1
u8 DSPHost_ReadHostMemory(u32 addr); u8 DSPHost_ReadHostMemory(u32 addr);
void DSPHost_WriteHostMemory(u8 value, u32 addr); void DSPHost_WriteHostMemory(u8 value, u32 addr);

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@ -58,6 +58,9 @@ bool DSPHost_Running()
void DSPHost_InterruptRequest() void DSPHost_InterruptRequest()
{ {
#ifdef DEBUG_EXP
NOTICE_LOG(DSPLLE, "Firing an interrupt on the PPC ASAP");
#endif
// Fire an interrupt on the PPC ASAP. // Fire an interrupt on the PPC ASAP.
g_dspInitialize.pGenerateDSPInterrupt(); g_dspInitialize.pGenerateDSPInterrupt();
} }