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JitArm64: Drop GetCRFieldBit's negate parameter
No caller is using it anymore.
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parent
71e9766519
commit
980a726313
@ -355,7 +355,7 @@ protected:
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Arm64Gen::ARM64Reg exit_address_after_return_reg = Arm64Gen::ARM64Reg::INVALID_REG);
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void WriteBLRExit(Arm64Gen::ARM64Reg dest);
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void GetCRFieldBit(int field, int bit, Arm64Gen::ARM64Reg out, bool negate = false);
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void GetCRFieldBit(int field, int bit, Arm64Gen::ARM64Reg out);
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void SetCRFieldBit(int field, int bit, Arm64Gen::ARM64Reg in, bool negate = false);
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void ClearCRFieldBit(int field, int bit);
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void SetCRFieldBit(int field, int bit);
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@ -20,7 +20,7 @@
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using namespace Arm64Gen;
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void JitArm64::GetCRFieldBit(int field, int bit, ARM64Reg out, bool negate)
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void JitArm64::GetCRFieldBit(int field, int bit, ARM64Reg out)
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{
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ARM64Reg CR = gpr.CR(field);
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ARM64Reg WCR = EncodeRegTo32(CR);
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@ -29,24 +29,20 @@ void JitArm64::GetCRFieldBit(int field, int bit, ARM64Reg out, bool negate)
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{
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case PowerPC::CR_SO_BIT: // check bit 59 set
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UBFX(out, CR, PowerPC::CR_EMU_SO_BIT, 1);
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if (negate)
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EOR(out, out, LogicalImm(1, GPRSize::B64));
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break;
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case PowerPC::CR_EQ_BIT: // check bits 31-0 == 0
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CMP(WCR, ARM64Reg::WZR);
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CSET(out, negate ? CC_NEQ : CC_EQ);
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CSET(out, CC_EQ);
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break;
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case PowerPC::CR_GT_BIT: // check val > 0
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CMP(CR, ARM64Reg::ZR);
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CSET(out, negate ? CC_LE : CC_GT);
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CSET(out, CC_GT);
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break;
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case PowerPC::CR_LT_BIT: // check bit 62 set
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UBFX(out, CR, PowerPC::CR_EMU_LT_BIT, 1);
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if (negate)
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EOR(out, out, LogicalImm(1, GPRSize::B64));
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break;
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default:
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@ -620,7 +616,7 @@ void JitArm64::crXXX(UGeckoInstruction inst)
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{
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auto WA = gpr.GetScopedReg();
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ARM64Reg XA = EncodeRegTo64(WA);
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GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA, false);
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GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA);
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SetCRFieldBit(inst.CRBD >> 2, 3 - (inst.CRBD & 3), XA, false);
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return;
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}
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@ -629,7 +625,7 @@ void JitArm64::crXXX(UGeckoInstruction inst)
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{
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auto WA = gpr.GetScopedReg();
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ARM64Reg XA = EncodeRegTo64(WA);
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GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA, false);
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GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA);
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SetCRFieldBit(inst.CRBD >> 2, 3 - (inst.CRBD & 3), XA, true);
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return;
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}
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@ -645,8 +641,8 @@ void JitArm64::crXXX(UGeckoInstruction inst)
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auto WB = gpr.GetScopedReg();
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ARM64Reg XB = EncodeRegTo64(WB);
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GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA, false);
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GetCRFieldBit(inst.CRBB >> 2, 3 - (inst.CRBB & 3), XB, false);
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GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA);
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GetCRFieldBit(inst.CRBB >> 2, 3 - (inst.CRBB & 3), XB);
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// Compute combined bit
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switch (inst.SUBOP10)
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