From 9e43796912db01e5ec619e23b5a5bca28a7e48ed Mon Sep 17 00:00:00 2001 From: JosJuice Date: Thu, 22 Jul 2021 10:24:38 +0200 Subject: [PATCH] JitArm64: Allow passing temp FPR to EmitMemcheck Small optimization. If the caller already has an FPR that it isn't using, might as well pass it on to fpr.Flush. --- Source/Core/Core/PowerPC/JitArm64/Jit.cpp | 15 ++++++++------- Source/Core/Core/PowerPC/JitArm64/Jit.h | 3 ++- .../Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp | 10 ++++++---- 3 files changed, 16 insertions(+), 12 deletions(-) diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.cpp b/Source/Core/Core/PowerPC/JitArm64/Jit.cpp index f494f128f6..af9ec677c7 100644 --- a/Source/Core/Core/PowerPC/JitArm64/Jit.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/Jit.cpp @@ -501,15 +501,16 @@ void JitArm64::WriteExceptionExit(ARM64Reg dest, bool only_external, bool always void JitArm64::WriteConditionalExceptionExit(int exception, u64 increment_sp_on_exit) { ARM64Reg WA = gpr.GetReg(); - WriteConditionalExceptionExit(exception, WA, increment_sp_on_exit); + WriteConditionalExceptionExit(exception, WA, Arm64Gen::ARM64Reg::INVALID_REG, + increment_sp_on_exit); gpr.Unlock(WA); } -void JitArm64::WriteConditionalExceptionExit(int exception, ARM64Reg temp_reg, +void JitArm64::WriteConditionalExceptionExit(int exception, ARM64Reg temp_gpr, ARM64Reg temp_fpr, u64 increment_sp_on_exit) { - LDR(IndexType::Unsigned, temp_reg, PPC_REG, PPCSTATE_OFF(Exceptions)); - FixupBranch no_exception = TBZ(temp_reg, IntLog2(exception)); + LDR(IndexType::Unsigned, temp_gpr, PPC_REG, PPCSTATE_OFF(Exceptions)); + FixupBranch no_exception = TBZ(temp_gpr, IntLog2(exception)); const bool switch_to_far_code = !IsInFarCode(); @@ -521,10 +522,10 @@ void JitArm64::WriteConditionalExceptionExit(int exception, ARM64Reg temp_reg, } if (increment_sp_on_exit != 0) - ADDI2R(ARM64Reg::SP, ARM64Reg::SP, increment_sp_on_exit, temp_reg); + ADDI2R(ARM64Reg::SP, ARM64Reg::SP, increment_sp_on_exit, temp_gpr); - gpr.Flush(FlushMode::MaintainState, temp_reg); - fpr.Flush(FlushMode::MaintainState, ARM64Reg::INVALID_REG); + gpr.Flush(FlushMode::MaintainState, temp_gpr); + fpr.Flush(FlushMode::MaintainState, temp_fpr); WriteExceptionExit(js.compilerPC, false, true); diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.h b/Source/Core/Core/PowerPC/JitArm64/Jit.h index f8247ae105..3ef1955e37 100644 --- a/Source/Core/Core/PowerPC/JitArm64/Jit.h +++ b/Source/Core/Core/PowerPC/JitArm64/Jit.h @@ -266,7 +266,8 @@ protected: void WriteExceptionExit(Arm64Gen::ARM64Reg dest, bool only_external = false, bool always_exception = false); void WriteConditionalExceptionExit(int exception, u64 increment_sp_on_exit = 0); - void WriteConditionalExceptionExit(int exception, Arm64Gen::ARM64Reg temp_reg, + void WriteConditionalExceptionExit(int exception, Arm64Gen::ARM64Reg temp_gpr, + Arm64Gen::ARM64Reg temp_fpr = Arm64Gen::ARM64Reg::INVALID_REG, u64 increment_sp_on_exit = 0); void FakeLKExit(u32 exit_address_after_return); void WriteBLRExit(Arm64Gen::ARM64Reg dest); diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp index 13cc4722a7..8bcfac7cbf 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp @@ -142,12 +142,12 @@ void JitArm64::EmitBackpatchRoutine(u32 flags, bool fastmem, bool do_farcode, AR if (slowmem_fixup) SetJumpTarget(*slowmem_fixup); - const ARM64Reg temp_reg = flags & BackPatchInfo::FLAG_LOAD ? ARM64Reg::W30 : ARM64Reg::W0; - const int temp_reg_index = DecodeReg(temp_reg); + const ARM64Reg temp_gpr = flags & BackPatchInfo::FLAG_LOAD ? ARM64Reg::W30 : ARM64Reg::W0; + const int temp_gpr_index = DecodeReg(temp_gpr); BitSet32 gprs_to_push_early = {}; if (memcheck) - gprs_to_push_early[temp_reg_index] = true; + gprs_to_push_early[temp_gpr_index] = true; if (flags & BackPatchInfo::FLAG_LOAD) gprs_to_push_early[0] = true; @@ -224,8 +224,10 @@ void JitArm64::EmitBackpatchRoutine(u32 flags, bool fastmem, bool do_farcode, AR if (memcheck) { + const ARM64Reg temp_fpr = fprs_to_push[0] ? ARM64Reg::INVALID_REG : ARM64Reg::Q0; const u64 early_push_size = Common::AlignUp(gprs_to_push_early.Count(), 2) * 8; - WriteConditionalExceptionExit(EXCEPTION_DSI, temp_reg, early_push_size); + + WriteConditionalExceptionExit(EXCEPTION_DSI, temp_gpr, temp_fpr, early_push_size); } if (flags & BackPatchInfo::FLAG_LOAD)