diff --git a/Source/Core/Core/HW/MemoryInterface.cpp b/Source/Core/Core/HW/MemoryInterface.cpp index 616b0de2a9..8f448c56df 100644 --- a/Source/Core/Core/HW/MemoryInterface.cpp +++ b/Source/Core/Core/HW/MemoryInterface.cpp @@ -3,6 +3,9 @@ #include "Core/HW/MemoryInterface.h" +#include + +#include "Common/BitField.h" #include "Common/ChunkFile.h" #include "Common/CommonTypes.h" #include "Core/HW/MMIO.h" @@ -51,7 +54,7 @@ enum union MIRegion { - u32 hex; + u32 hex = 0; struct { u16 first_page; @@ -61,64 +64,55 @@ union MIRegion union MIProtType { - u16 hex; - struct - { - u16 reg0 : 2; - u16 reg1 : 2; - u16 reg2 : 2; - u16 reg3 : 2; - u16 : 8; - }; + u16 hex = 0; + + BitField<0, 2, u16> reg0; + BitField<2, 2, u16> reg1; + BitField<4, 2, u16> reg2; + BitField<6, 2, u16> reg3; + BitField<8, 8, u16> reserved; }; union MIIRQMask { - u16 hex; - struct - { - u16 reg0 : 1; - u16 reg1 : 1; - u16 reg2 : 1; - u16 reg3 : 1; - u16 all_regs : 1; - u16 : 11; - }; + u16 hex = 0; + + BitField<0, 1, u16> reg0; + BitField<1, 1, u16> reg1; + BitField<2, 1, u16> reg2; + BitField<3, 1, u16> reg3; + BitField<4, 1, u16> all_regs; + BitField<5, 11, u16> reserved; }; union MIIRQFlag { - u16 hex; - struct - { - u16 reg0 : 1; - u16 reg1 : 1; - u16 reg2 : 1; - u16 reg3 : 1; - u16 all_regs : 1; - u16 : 11; - }; + u16 hex = 0; + + BitField<0, 1, u16> reg0; + BitField<1, 1, u16> reg1; + BitField<2, 1, u16> reg2; + BitField<3, 1, u16> reg3; + BitField<4, 1, u16> all_regs; + BitField<5, 11, u16> reserved; }; union MIProtAddr { - u32 hex; + u32 hex = 0; struct { u16 lo; u16 hi; }; - struct - { - u32 : 5; - u32 addr : 25; - u32 : 2; - }; + BitField<0, 5, u32> reserved_1; + BitField<5, 25, u32> addr; + BitField<30, 2, u32> reserved_2; }; union MITimer { - u32 hex; + u32 hex = 0; struct { u16 lo; @@ -128,14 +122,14 @@ union MITimer struct MIMemStruct { - MIRegion regions[4]; + std::array regions; MIProtType prot_type; MIIRQMask irq_mask; MIIRQFlag irq_flag; - u16 unknown1; + u16 unknown1 = 0; MIProtAddr prot_addr; - MITimer timers[10]; - u16 unknown2; + std::array timers; + u16 unknown2 = 0; }; // STATE_TO_SAVE @@ -148,7 +142,7 @@ void DoState(PointerWrap& p) void RegisterMMIO(MMIO::Mapping* mmio, u32 base) { - for (int i = MI_REGION0_FIRST; i <= MI_REGION3_LAST; i += 4) + for (u32 i = MI_REGION0_FIRST; i <= MI_REGION3_LAST; i += 4) { auto& region = g_mi_mem.regions[i / 4]; mmio->Register(base | i, MMIO::DirectRead(®ion.first_page), @@ -169,7 +163,7 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base) mmio->Register(base | MI_UNKNOWN1, MMIO::DirectRead(&g_mi_mem.unknown1), MMIO::DirectWrite(&g_mi_mem.unknown1)); - // The naming is confusing here: the registed contains the lower part of + // The naming is confusing here: the register contains the lower part of // the address (hence MI_..._LO but this is still the high part of the // overall register. mmio->Register(base | MI_PROT_ADDR_LO, MMIO::DirectRead(&g_mi_mem.prot_addr.hi), @@ -177,7 +171,7 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base) mmio->Register(base | MI_PROT_ADDR_HI, MMIO::DirectRead(&g_mi_mem.prot_addr.lo), MMIO::DirectWrite(&g_mi_mem.prot_addr.lo)); - for (int i = 0; i < 10; ++i) + for (u32 i = 0; i < g_mi_mem.timers.size(); ++i) { auto& timer = g_mi_mem.timers[i]; mmio->Register(base | (MI_TIMER0_HI + 4 * i), MMIO::DirectRead(&timer.hi), @@ -189,7 +183,7 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base) mmio->Register(base | MI_UNKNOWN2, MMIO::DirectRead(&g_mi_mem.unknown2), MMIO::DirectWrite(&g_mi_mem.unknown2)); - for (int i = 0; i < 0x1000; i += 4) + for (u32 i = 0; i < 0x1000; i += 4) { mmio->Register(base | i, MMIO::ReadToSmaller(mmio, base | i, base | (i + 2)), MMIO::WriteToSmaller(mmio, base | i, base | (i + 2)));