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FifoRecorder: Use Video Common to record efb2ram correctly.
Texture updates have been moved into TextureCache, while TMEM updates where moved into bpmem. Code for handling efb2ram updates was added to TextureCache. There was a bug for preloaded RGBA8 textures, it only copied half the texture. The TODO was wrong too.
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@ -11,6 +11,7 @@
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#include "Core/ConfigManager.h"
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#include "Core/FifoPlayer/FifoPlayer.h"
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#include "Core/FifoPlayer/FifoRecorder.h"
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#include "Core/HW/Memmap.h"
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#include "VideoCommon/Debugger.h"
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@ -19,6 +20,7 @@
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#include "VideoCommon/RenderBase.h"
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#include "VideoCommon/Statistics.h"
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#include "VideoCommon/TextureCacheBase.h"
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#include "VideoCommon/VideoCommon.h"
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#include "VideoCommon/VideoConfig.h"
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static const u64 TEXHASH_INVALID = 0;
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@ -395,6 +397,25 @@ TextureCache::TCacheEntryBase* TextureCache::Load(const u32 stage)
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full_format = texformat | (tlutfmt << 16);
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const u32 texture_size = TexDecoder_GetTextureSizeInBytes(expandedWidth, expandedHeight, texformat);
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u32 additional_mips_size = 0; // not including level 0, which is texture_size
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// GPUs don't like when the specified mipmap count would require more than one 1x1-sized LOD in the mipmap chain
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// e.g. 64x64 with 7 LODs would have the mipmap chain 64x64,32x32,16x16,8x8,4x4,2x2,1x1,0x0, so we limit the mipmap count to 6 there
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tex_levels = std::min<u32>(IntLog2(std::max(width, height)) + 1, tex_levels);
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for (u32 level = 1; level != tex_levels; ++level)
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{
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// We still need to calculate the original size of the mips
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const u32 expanded_mip_width = ROUND_UP(CalculateLevelSize(width, level), bsw);
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const u32 expanded_mip_height = ROUND_UP(CalculateLevelSize(height, level), bsh);
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additional_mips_size += TexDecoder_GetTextureSizeInBytes(expanded_mip_width, expanded_mip_height, texformat);
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}
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// If we are recording a FifoLog, keep track of what memory we read.
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// FifiRecorder does it's own memory modification tracking independant of the texture hashing below.
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if (g_bRecordFifoData && !from_tmem)
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FifoRecorder::GetInstance().UseMemory(address, texture_size + additional_mips_size, MemoryUpdate::TEXTURE_MAP);
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const u8* src_data;
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if (from_tmem)
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@ -415,10 +436,6 @@ TextureCache::TCacheEntryBase* TextureCache::Load(const u32 stage)
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full_hash = base_hash;
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}
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// GPUs don't like when the specified mipmap count would require more than one 1x1-sized LOD in the mipmap chain
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// e.g. 64x64 with 7 LODs would have the mipmap chain 64x64,32x32,16x16,8x8,4x4,2x2,1x1,0x0, so we limit the mipmap count to 6 there
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tex_levels = std::min<u32>(IntLog2(std::max(width, height)) + 1, tex_levels);
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// Search the texture cache for textures by address
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//
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// Find all texture cache entries for the current texture address, and decide whether to use one of
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@ -740,7 +757,7 @@ void TextureCache::CopyRenderTargetToTexture(u32 dstAddr, unsigned int dstFormat
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//
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// For historical reasons, Dolphin doesn't actually implement "pure" EFB to RAM emulation, but only EFB to texture and hybrid EFB copies.
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float colmat[28] = {0};
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float colmat[28] = { 0 };
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float *const fConstAdd = colmat + 16;
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float *const ColorMask = colmat + 20;
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ColorMask[0] = ColorMask[1] = ColorMask[2] = ColorMask[3] = 255.0f;
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@ -1058,6 +1075,17 @@ void TextureCache::CopyRenderTargetToTexture(u32 dstAddr, unsigned int dstFormat
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count++), 0);
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}
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if (g_bRecordFifoData)
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{
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// Mark the memory behind this efb copy as dynamicly generated for the Fifo log
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u32 address = dstAddr;
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for (u32 i = 0; i < entry->NumBlocksY(); i++)
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{
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FifoRecorder::GetInstance().UseMemory(address, entry->CacheLinesPerRow() * 32, MemoryUpdate::TEXTURE_MAP, true);
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address += entry->memory_stride;
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}
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}
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textures_by_address.emplace((u64)dstAddr, entry);
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}
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