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HW/ProcessorInterface: Avoid ppcState global.
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@ -65,14 +65,14 @@ void ProcessorInterfaceManager::RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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MMIO::ComplexWrite<u32>([](Core::System& system, u32, u32 val) {
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MMIO::ComplexWrite<u32>([](Core::System& system, u32, u32 val) {
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auto& processor_interface = system.GetProcessorInterface();
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auto& processor_interface = system.GetProcessorInterface();
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processor_interface.m_interrupt_cause &= ~val;
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processor_interface.m_interrupt_cause &= ~val;
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processor_interface.UpdateException();
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processor_interface.UpdateException(system);
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}));
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}));
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mmio->Register(base | PI_INTERRUPT_MASK, MMIO::DirectRead<u32>(&m_interrupt_mask),
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mmio->Register(base | PI_INTERRUPT_MASK, MMIO::DirectRead<u32>(&m_interrupt_mask),
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MMIO::ComplexWrite<u32>([](Core::System& system, u32, u32 val) {
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MMIO::ComplexWrite<u32>([](Core::System& system, u32, u32 val) {
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auto& processor_interface = system.GetProcessorInterface();
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auto& processor_interface = system.GetProcessorInterface();
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processor_interface.m_interrupt_mask = val;
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processor_interface.m_interrupt_mask = val;
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processor_interface.UpdateException();
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processor_interface.UpdateException(system);
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}));
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}));
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mmio->Register(base | PI_FIFO_BASE, MMIO::DirectRead<u32>(&m_fifo_cpu_base),
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mmio->Register(base | PI_FIFO_BASE, MMIO::DirectRead<u32>(&m_fifo_cpu_base),
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@ -137,12 +137,13 @@ void ProcessorInterfaceManager::RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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}
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}
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}
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}
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void ProcessorInterfaceManager::UpdateException()
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void ProcessorInterfaceManager::UpdateException(Core::System& system)
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{
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{
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auto& ppc_state = system.GetPPCState();
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if ((m_interrupt_cause & m_interrupt_mask) != 0)
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if ((m_interrupt_cause & m_interrupt_mask) != 0)
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PowerPC::ppcState.Exceptions |= EXCEPTION_EXTERNAL_INT;
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ppc_state.Exceptions |= EXCEPTION_EXTERNAL_INT;
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else
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else
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PowerPC::ppcState.Exceptions &= ~EXCEPTION_EXTERNAL_INT;
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ppc_state.Exceptions &= ~EXCEPTION_EXTERNAL_INT;
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}
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}
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static const char* Debug_GetInterruptName(u32 cause_mask)
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static const char* Debug_GetInterruptName(u32 cause_mask)
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@ -208,7 +209,7 @@ void ProcessorInterfaceManager::SetInterrupt(u32 cause_mask, bool set)
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m_interrupt_cause &= ~cause_mask; // is there any reason to have this possibility?
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m_interrupt_cause &= ~cause_mask; // is there any reason to have this possibility?
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// F|RES: i think the hw devices reset the interrupt in the PI to 0
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// F|RES: i think the hw devices reset the interrupt in the PI to 0
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// if the interrupt cause is eliminated. that isn't done by software (afaik)
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// if the interrupt cause is eliminated. that isn't done by software (afaik)
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UpdateException();
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UpdateException(Core::System::GetInstance());
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}
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}
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void ProcessorInterfaceManager::SetResetButton(bool set)
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void ProcessorInterfaceManager::SetResetButton(bool set)
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@ -87,7 +87,7 @@ public:
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private:
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private:
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// Let the PPC know that an external exception is set/cleared
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// Let the PPC know that an external exception is set/cleared
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void UpdateException();
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void UpdateException(Core::System& system);
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void SetResetButton(bool set);
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void SetResetButton(bool set);
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