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JitArm64: Optimize additional cases of ANDI2R and friends

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Now we'll never need a scratch register for values that are all zeroes
or all ones.
This commit is contained in:
JosJuice
2023-12-17 17:24:13 +01:00
parent 6303416201
commit a8e1e1ae48
1 changed files with 22 additions and 1 deletions
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23
Source/Core/Common/Arm64Emitter.cpp
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@ -4045,6 +4045,10 @@ void ARM64XEmitter::ANDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
{ {
// Do nothing // Do nothing
} }
else if (imm == 0)
{
MOVZ(Rd, 0);
}
else if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32)) else if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32))
{ {
AND(Rd, Rn, result); AND(Rd, Rn, result);
@ -4065,6 +4069,10 @@ void ARM64XEmitter::ORRI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
{ {
// Do nothing // Do nothing
} }
else if (imm == (Is64Bit(Rn) ? 0xFFFF'FFFF'FFFF'FFFF : 0xFFFF'FFFF))
{
MOVN(Rd, 0);
}
else if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32)) else if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32))
{ {
ORR(Rd, Rn, result); ORR(Rd, Rn, result);
@ -4085,6 +4093,10 @@ void ARM64XEmitter::EORI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
{ {
// Do nothing // Do nothing
} }
else if (imm == (Is64Bit(Rn) ? 0xFFFF'FFFF'FFFF'FFFF : 0xFFFF'FFFF))
{
MVN(Rd, Rn);
}
else if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32)) else if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32))
{ {
EOR(Rd, Rn, result); EOR(Rd, Rn, result);
@ -4101,7 +4113,16 @@ void ARM64XEmitter::EORI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
void ARM64XEmitter::ANDSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch) void ARM64XEmitter::ANDSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
{ {
if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32)) if (imm == 0)
{
ANDS(Rd, Is64Bit(Rn) ? ARM64Reg::ZR : ARM64Reg::WZR,
Is64Bit(Rn) ? ARM64Reg::ZR : ARM64Reg::WZR);
}
else if (imm == (Is64Bit(Rn) ? 0xFFFF'FFFF'FFFF'FFFF : 0xFFFF'FFFF))
{
ANDS(Rd, Rn, Rn);
}
else if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32))
{ {
ANDS(Rd, Rn, result); ANDS(Rd, Rn, result);
} }