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Make address translation respect the CPU translation mode.
The PowerPC CPU has bits in MSR (DR and IR) which control whether addresses are translated. We should respect these instead of mixing physical addresses and translated addresses into the same address space. This is mostly mass-renaming calls to memory accesses APIs from places which expect address translation to use a different version from those which do not expect address translation. This does very little on its own, but it's the first step to a correct BAT implementation.
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@ -207,27 +207,6 @@ namespace JitInterface
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jit->GetBlockCache()->InvalidateICache(address, size, forced);
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}
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u32 ReadOpcodeJIT(u32 _Address)
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{
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if (bMMU && !bFakeVMEM && (_Address & Memory::ADDR_MASK_MEM1))
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{
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_Address = Memory::TranslateAddress<Memory::FLAG_OPCODE>(_Address);
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if (_Address == 0)
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{
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return 0;
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}
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}
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u32 inst;
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// Bypass the icache for the external interrupt exception handler
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// -- this is stupid, should respect HID0
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if ( (_Address & 0x0FFFFF00) == 0x00000500 )
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inst = Memory::ReadUnchecked_U32(_Address);
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else
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inst = PowerPC::ppcState.iCache.ReadInstruction(_Address);
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return inst;
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}
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void CompileExceptionCheck(ExceptionType type)
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{
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if (!jit)
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@ -250,7 +229,7 @@ namespace JitInterface
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if (type == ExceptionType::EXCEPTIONS_FIFO_WRITE)
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{
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// Check in case the code has been replaced since: do we need to do this?
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int optype = GetOpInfo(Memory::ReadUnchecked_U32(PC))->type;
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int optype = GetOpInfo(PowerPC::HostRead_U32(PC))->type;
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if (optype != OPTYPE_STORE && optype != OPTYPE_STOREFP && (optype != OPTYPE_STOREPS))
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return;
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}
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