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Split TevStageIndirect::mid into matrix_index and matrix_id
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@ -300,6 +300,31 @@ struct fmt::formatter<IndTexBias> : EnumFormatter<IndTexBias::STU>
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formatter() : EnumFormatter({"None", "S", "T", "ST", "U", "SU", "TU", "STU"}) {}
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};
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enum class IndMtxIndex : u32
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{
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Off = 0,
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Matrix0 = 1,
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Matrix1 = 2,
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Matrix2 = 3,
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};
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template <>
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struct fmt::formatter<IndMtxIndex> : EnumFormatter<IndMtxIndex::Matrix2>
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{
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formatter() : EnumFormatter({"Off", "Matrix 0", "Matrix 1", "Matrix 2"}) {}
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};
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enum class IndMtxId : u32
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{
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Indirect = 0,
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S = 1,
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T = 2,
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};
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template <>
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struct fmt::formatter<IndMtxId> : EnumFormatter<IndMtxId::T>
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{
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formatter() : EnumFormatter({"Indirect", "S", "T"}) {}
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};
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// Indirect texture bump alpha
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enum class IndTexBumpAlpha : u32
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{
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@ -335,7 +360,7 @@ union IND_MTXA
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{
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BitField<0, 11, s32> ma;
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BitField<11, 11, s32> mb;
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BitField<22, 2, u32> s0; // bits 0-1 of scale factor
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BitField<22, 2, u8, u32> s0; // bits 0-1 of scale factor
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u32 hex;
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};
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@ -343,7 +368,7 @@ union IND_MTXB
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{
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BitField<0, 11, s32> mc;
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BitField<11, 11, s32> md;
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BitField<22, 2, u32> s1; // bits 2-3 of scale factor
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BitField<22, 2, u8, u32> s1; // bits 2-3 of scale factor
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u32 hex;
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};
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@ -351,7 +376,7 @@ union IND_MTXC
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{
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BitField<0, 11, s32> me;
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BitField<11, 11, s32> mf;
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BitField<22, 2, u32> s2; // bits 4-5 of scale factor
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BitField<22, 2, u8, u32> s2; // bits 4-5 of scale factor
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u32 hex;
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};
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@ -360,6 +385,7 @@ struct IND_MTX
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IND_MTXA col0;
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IND_MTXB col1;
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IND_MTXC col2;
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u8 GetScale() const { return (col0.s0 << 0) | (col1.s1 << 2) | (col2.s2 << 4); }
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};
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union IND_IMASK
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@ -475,8 +501,12 @@ union TevStageIndirect
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BitField<4, 1, bool, u32> bias_s;
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BitField<5, 1, bool, u32> bias_t;
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BitField<6, 1, bool, u32> bias_u;
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BitField<7, 2, IndTexBumpAlpha> bs; // Indicates which coordinate will become the 'bump alpha'
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BitField<9, 4, u32> mid; // Matrix ID to multiply offsets with
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BitField<7, 2, IndTexBumpAlpha> bs; // Indicates which coordinate will become the 'bump alpha'
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// Indicates which indirect matrix is used when matrix_id is Indirect.
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// Also always indicates which indirect matrix to use for the scale factor, even with S or T.
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BitField<9, 2, IndMtxIndex> matrix_index;
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// Should be set to Indirect (0) if matrix_index is Off (0)
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BitField<11, 2, IndMtxId> matrix_id;
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BitField<13, 3, IndTexWrap> sw; // Wrapping factor for S of regular coord
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BitField<16, 3, IndTexWrap> tw; // Wrapping factor for T of regular coord
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BitField<19, 1, bool, u32> lb_utclod; // Use modified or unmodified texture
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@ -492,9 +522,9 @@ union TevStageIndirect
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u32 fullhex;
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// If bs and mid are zero, the result of the stage is independent of
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// If bs and matrix are zero, the result of the stage is independent of
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// the texture sample data, so we can skip sampling the texture.
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bool IsActive() const { return bs != IndTexBumpAlpha::Off || mid != 0; }
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bool IsActive() const { return bs != IndTexBumpAlpha::Off || matrix_index != IndMtxIndex::Off; }
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};
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template <>
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struct fmt::formatter<TevStageIndirect>
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@ -508,13 +538,15 @@ struct fmt::formatter<TevStageIndirect>
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"Format: {}\n"
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"Bias: {}\n"
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"Bump alpha: {}\n"
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"Offset matrix index: {}\n"
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"Offset matrix ID: {}\n"
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"Regular coord S wrapping factor: {}\n"
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"Regular coord T wrapping factor: {}\n"
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"Use modified texture coordinates for LOD computation: {}\n"
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"Add texture coordinates from previous TEV stage: {}",
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tevind.bt, tevind.fmt, tevind.bias, tevind.bs, tevind.mid, tevind.sw,
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tevind.tw, tevind.lb_utclod ? "Yes" : "No", tevind.fb_addprev ? "Yes" : "No");
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tevind.bt, tevind.fmt, tevind.bias, tevind.bs, tevind.matrix_index,
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tevind.matrix_id, tevind.sw, tevind.tw, tevind.lb_utclod ? "Yes" : "No",
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tevind.fb_addprev ? "Yes" : "No");
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}
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};
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@ -1914,7 +1946,7 @@ struct BPMemory
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GenMode genMode;
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u32 display_copy_filter[4]; // 01-04
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u32 unknown; // 05
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// indirect matrices (set by GXSetIndTexMtx, selected by TevStageIndirect::mid)
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// indirect matrices (set by GXSetIndTexMtx, selected by TevStageIndirect::matrix_index)
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// abc form a 2x3 offset matrix, there's 3 such matrices
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// the 3 offset matrices can either be indirect type, S-type, or T-type
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// 6bit scale factor s is distributed across IND_MTXA/B/C.
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