diff --git a/Source/Core/Core/DSP/DSPTables.cpp b/Source/Core/Core/DSP/DSPTables.cpp
index e691c90957..12e5d31918 100644
--- a/Source/Core/Core/DSP/DSPTables.cpp
+++ b/Source/Core/Core/DSP/DSPTables.cpp
@@ -402,7 +402,7 @@ const std::array<pdlabel_t, 96> pdlabels =
   {0xffd0, "0xffd0",nullptr,},
   {0xffd1, "SampleFormat", "SampleFormat",},
   {0xffd2, "0xffd2",nullptr,},
-  {0xffd3, "UnkZelda", "Unk Zelda reads/writes from/to it",},
+  {0xffd3, "ACDRAW", "Accelerator raw read/write from ARAM",},
   {0xffd4, "ACSAH", "Accelerator start address H",},
   {0xffd5, "ACSAL", "Accelerator start address L",},
   {0xffd6, "ACEAH", "Accelerator end address H",},
@@ -412,7 +412,7 @@ const std::array<pdlabel_t, 96> pdlabels =
   {0xffda, "pred_scale", "pred_scale",},
   {0xffdb, "yn1", "yn1",},
   {0xffdc, "yn2", "yn2",},
-  {0xffdd, "ARAM", "Direct Read from ARAM (uses ADPCM)",},
+  {0xffdd, "ACDSAMP", "Accelerator processed sample read from ARAM or ACIN",},
   {0xffde, "GAIN", "Gain",},
   {0xffdf, "ACIN", "Accelerator MMIO PCM input value",},
 
diff --git a/Source/DSPSpy/tests/accelerator_loop_test.ds b/Source/DSPSpy/tests/accelerator_loop_test.ds
index 6348f52efe..82ec2c1283 100644
--- a/Source/DSPSpy/tests/accelerator_loop_test.ds
+++ b/Source/DSPSpy/tests/accelerator_loop_test.ds
@@ -31,7 +31,7 @@ call load_hw_reg_to_regs
 call send_back ; check the accelerator regs before a read
 
 bloopi #40, end_of_loop
-  lr $IX3, @ARAM
+  lr $IX3, @ACDSAMP
   call load_hw_reg_to_regs
   call send_back ; after a read
 end_of_loop:
diff --git a/Source/DSPSpy/tests/accelerator_raw_test.ds b/Source/DSPSpy/tests/accelerator_raw_test.ds
index 6c91ef958e..3eeedaae67 100644
--- a/Source/DSPSpy/tests/accelerator_raw_test.ds
+++ b/Source/DSPSpy/tests/accelerator_raw_test.ds
@@ -29,7 +29,7 @@ loop_read_test:
   call send_back ; check the accelerator regs before a read
 
   bloopi #4, end_of_read_loop
-    lr $IX3, @0xffd3 ; Raw D3 reads
+    lr $IX3, @ACDRAW ; Raw reads
     call load_hw_reg_to_regs
     call send_back ; after a read
     nop
@@ -62,7 +62,7 @@ loop_write_test:
   call send_back ; check the accelerator regs before a write
 
   bloopi #4, end_of_write_loop
-    sr @0xffd3, $IX3 ; Raw D3 writes
+    sr @ACDRAW, $IX3 ; Raw writes
     call load_hw_reg_to_regs
     call send_back ; after a write
     nop
diff --git a/Source/DSPSpy/tests/accelerator_test.ds b/Source/DSPSpy/tests/accelerator_test.ds
index a05866d5bb..86049a600e 100644
--- a/Source/DSPSpy/tests/accelerator_test.ds
+++ b/Source/DSPSpy/tests/accelerator_test.ds
@@ -35,8 +35,8 @@ test_accelerator_addrs_ex:
   lrs $AX0.L, @ACCAL
 
   ; Make the accelerator read memory
-  lrs $AX1.H, @ARAM
-  lrs $AX1.H, @ARAM
+  lrs $AX1.H, @ACDSAMP
+  lrs $AX1.H, @ACDSAMP
   ; AX1 -> new current position after read
   lrs $AX1.H, @ACCAH
   lrs $AX1.L, @ACCAL
diff --git a/Source/DSPSpy/tests/dsp_base_noirq.inc b/Source/DSPSpy/tests/dsp_base_noirq.inc
index 1558c7c5ca..1b59b090e0 100644
--- a/Source/DSPSpy/tests/dsp_base_noirq.inc
+++ b/Source/DSPSpy/tests/dsp_base_noirq.inc
@@ -144,7 +144,7 @@ irq5:
 	lri		$ac0.m, #0xbbbb
 	sr		@0xffda, $ac0.m ; pred scale
 	sr		@0xffdb, $ac0.m ; yn1
-	lr		$ix2, @ARAM
+	lr		$ix2, @ACDSAMP
 	sr		@0xffdc, $ac0.m ; yn2
 	rti
 irq6:
diff --git a/Source/DSPSpy/tests/mul_test.ds b/Source/DSPSpy/tests/mul_test.ds
index 8f5ca9810f..706488e35f 100644
--- a/Source/DSPSpy/tests/mul_test.ds
+++ b/Source/DSPSpy/tests/mul_test.ds
@@ -214,7 +214,7 @@ LRI $AC1.M, #0xFFFF
 SRS @GAIN, $AC1.M
 
 ; Let's now load a sample through the accelerator.
-LRS $AC1.M, @ARAM
+LRS $AC1.M, @ACDSAMP
 call send_back
 
 jmp end_of_test
diff --git a/Source/DSPSpy/tests/rti_test.ds b/Source/DSPSpy/tests/rti_test.ds
index 81acd6af47..3dff950a79 100644
--- a/Source/DSPSpy/tests/rti_test.ds
+++ b/Source/DSPSpy/tests/rti_test.ds
@@ -27,15 +27,15 @@ test_main:
 
 
 	LRI $AX1.H, #0x0000
-	LRS $AX0.L, @ARAM ; Trigger interrupt
+	LRS $AX0.L, @ACDSAMP ; Trigger interrupt
 	CALL send_back
 
 	LRI $AX1.H, #0x0001
-	LRS $AX0.L, @ARAM ; Trigger interrupt
+	LRS $AX0.L, @ACDSAMP ; Trigger interrupt
 	CALL send_back
 
 	LRI $AX1.H, #0x0000
-	LRS $AX0.L, @ARAM ; Trigger interrupt
+	LRS $AX0.L, @ACDSAMP ; Trigger interrupt
 	CALL send_back
 
 	jmp end_of_test