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implement clrl (clral0/1) in the table

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git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2910 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
nakeee
2009-04-06 21:55:50 +00:00
parent 24991b60a3
commit cd439cdce0
3 changed files with 22 additions and 2 deletions
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19
Source/Plugins/Plugin_DSP_LLE-testing/Src/DSPInterpreter.cpp
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@ -432,6 +432,9 @@ void tstaxh(const UDSPInstruction& opc)
Update_SR_Register16(val);
}
// CLR $acR
// 1000 r001 xxxx xxxx
// Clears accumulator $acR
void clr(const UDSPInstruction& opc)
{
u8 reg = (opc.hex >> 11) & 0x1;
@ -441,8 +444,24 @@ void clr(const UDSPInstruction& opc)
Update_SR_Register64((s64)0); // really?
}
// CLRL $acR.l
// 1111 110r xxxx xxxx
// Clears $acR.l - low 16 bits of accumulator $acR.
void clrl(const UDSPInstruction& opc)
{
u16 reg = DSP_REG_ACL0 + ((opc.hex >> 11) & 0x1);
g_dsp.r[reg] &= 0xFF00;
// Should this be 64bit?
Update_SR_Register64((s64)reg);
}
// CLRP
// 1000 0100 xxxx xxxx
// Clears product register $prod.
void clrp(const UDSPInstruction& opc)
{
// Magic numbers taken from doddie's doc
g_dsp.r[0x14] = 0x0000;
g_dsp.r[0x15] = 0xfff0;
g_dsp.r[0x16] = 0x00ff;