piwalker/dolphin
1
0
Fork 0
mirror of https://github.com/dolphin-emu/dolphin.git synced 2025-07-25 07:09:48 -06:00
Code Issues Packages Projects Releases Wiki Activity

Fix an incorrect opcode for an SSE instruction in x64Emitter.cpp. CVTSD2SI should write 0x2D, not 0xF2.

Browse Source 
Also format the NormalSSEOps enum.
This commit is contained in:
Lioncash
2013-09-18 07:43:31 -04:00
parent 86f6e8cc1e
commit d03fb11188
1 changed files with 22 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
Source/Core/Common/Src/x64Emitter.cpp
View File

@ -45,7 +45,7 @@ enum NormalSSEOps
sseANDN = 0x55, //ANDN sseANDN = 0x55, //ANDN
sseOR = 0x56, sseOR = 0x56,
sseXOR = 0x57, sseXOR = 0x57,
sseMUL = 0x59, //MUL, sseMUL = 0x59, //MUL
sseDIV = 0x5E, //DIV sseDIV = 0x5E, //DIV
sseMIN = 0x5D, //MIN sseMIN = 0x5D, //MIN
sseMAX = 0x5F, //MAX sseMAX = 0x5F, //MAX
@ -1276,7 +1276,7 @@ void XEmitter::CVTPD2PS(X64Reg regOp, OpArg arg) {WriteSSEOp(64, 0x5A, true, reg
void XEmitter::CVTSD2SS(X64Reg regOp, OpArg arg) {WriteSSEOp(64, 0x5A, false, regOp, arg);} void XEmitter::CVTSD2SS(X64Reg regOp, OpArg arg) {WriteSSEOp(64, 0x5A, false, regOp, arg);}
void XEmitter::CVTSS2SD(X64Reg regOp, OpArg arg) {WriteSSEOp(32, 0x5A, false, regOp, arg);} void XEmitter::CVTSS2SD(X64Reg regOp, OpArg arg) {WriteSSEOp(32, 0x5A, false, regOp, arg);}
void XEmitter::CVTSD2SI(X64Reg regOp, OpArg arg) {WriteSSEOp(32, 0xF2, false, regOp, arg);} void XEmitter::CVTSD2SI(X64Reg regOp, OpArg arg) {WriteSSEOp(32, 0x2D, false, regOp, arg);}
void XEmitter::CVTDQ2PD(X64Reg regOp, OpArg arg) {WriteSSEOp(32, 0xE6, false, regOp, arg);} void XEmitter::CVTDQ2PD(X64Reg regOp, OpArg arg) {WriteSSEOp(32, 0xE6, false, regOp, arg);}
void XEmitter::CVTDQ2PS(X64Reg regOp, OpArg arg) {WriteSSEOp(32, 0x5B, true, regOp, arg);} void XEmitter::CVTDQ2PS(X64Reg regOp, OpArg arg) {WriteSSEOp(32, 0x5B, true, regOp, arg);}