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Merge pull request #11243 from Sintendo/arm64mul
JitArm64: Optimize multiplication
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commit
d7593dd721
@ -332,6 +332,7 @@ protected:
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void (ARM64XEmitter::*op)(Arm64Gen::ARM64Reg, Arm64Gen::ARM64Reg, u64,
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Arm64Gen::ARM64Reg),
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bool Rc = false);
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bool MultiplyImmediate(u32 imm, int a, int d, bool rc);
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void SetFPRFIfNeeded(bool single, Arm64Gen::ARM64Reg reg);
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void Force25BitPrecision(Arm64Gen::ARM64Reg output, Arm64Gen::ARM64Reg input);
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@ -7,6 +7,7 @@
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#include "Common/Assert.h"
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#include "Common/BitUtils.h"
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#include "Common/CommonTypes.h"
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#include "Common/MathUtil.h"
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#include "Core/Core.h"
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#include "Core/CoreTiming.h"
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@ -883,6 +884,75 @@ void JitArm64::addic(UGeckoInstruction inst)
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}
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}
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bool JitArm64::MultiplyImmediate(u32 imm, int a, int d, bool rc)
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{
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if (imm == 0)
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{
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// Multiplication by zero (0).
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gpr.SetImmediate(d, 0);
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if (rc)
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ComputeRC0(gpr.GetImm(d));
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}
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else if (imm == 1)
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{
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// Multiplication by one (1).
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if (d != a)
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{
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gpr.BindToRegister(d, false);
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MOV(gpr.R(d), gpr.R(a));
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}
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if (rc)
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ComputeRC0(gpr.R(d));
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}
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else if (MathUtil::IsPow2(imm))
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{
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// Multiplication by a power of two (2^n).
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const int shift = IntLog2(imm);
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gpr.BindToRegister(d, d == a);
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LSL(gpr.R(d), gpr.R(a), shift);
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if (rc)
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ComputeRC0(gpr.R(d));
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}
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else if (MathUtil::IsPow2(imm - 1))
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{
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// Multiplication by a power of two plus one (2^n + 1).
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const int shift = IntLog2(imm - 1);
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gpr.BindToRegister(d, d == a);
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ADD(gpr.R(d), gpr.R(a), gpr.R(a), ArithOption(gpr.R(a), ShiftType::LSL, shift));
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if (rc)
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ComputeRC0(gpr.R(d));
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}
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else if (MathUtil::IsPow2(~imm + 1))
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{
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// Multiplication by a negative power of two (-(2^n)).
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const int shift = IntLog2(~imm + 1);
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gpr.BindToRegister(d, d == a);
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NEG(gpr.R(d), gpr.R(a), ArithOption(gpr.R(a), ShiftType::LSL, shift));
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if (rc)
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ComputeRC0(gpr.R(d));
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}
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else if (MathUtil::IsPow2(~imm + 2))
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{
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// Multiplication by a negative power of two plus one (-(2^n) + 1).
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const int shift = IntLog2(~imm + 2);
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gpr.BindToRegister(d, d == a);
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SUB(gpr.R(d), gpr.R(a), gpr.R(a), ArithOption(gpr.R(a), ShiftType::LSL, shift));
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if (rc)
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ComputeRC0(gpr.R(d));
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}
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else
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{
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// Immediate did not match any known special cases.
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return false;
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}
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return true;
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}
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void JitArm64::mulli(UGeckoInstruction inst)
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{
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INSTRUCTION_START
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@ -895,12 +965,21 @@ void JitArm64::mulli(UGeckoInstruction inst)
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s32 i = (s32)gpr.GetImm(a);
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gpr.SetImmediate(d, i * inst.SIMM_16);
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}
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else if (MultiplyImmediate((u32)(s32)inst.SIMM_16, a, d, false))
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{
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// Code is generated inside MultiplyImmediate, nothing to be done here.
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}
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else
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{
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gpr.BindToRegister(d, d == a);
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ARM64Reg WA = gpr.GetReg();
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const bool allocate_reg = d == a;
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gpr.BindToRegister(d, allocate_reg);
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// Reuse d to hold the immediate if possible, allocate a register otherwise.
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ARM64Reg WA = allocate_reg ? gpr.GetReg() : gpr.R(d);
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MOVI2R(WA, (u32)(s32)inst.SIMM_16);
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MUL(gpr.R(d), gpr.R(a), WA);
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if (allocate_reg)
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gpr.Unlock(WA);
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}
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}
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@ -920,6 +999,11 @@ void JitArm64::mullwx(UGeckoInstruction inst)
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if (inst.Rc)
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ComputeRC0(gpr.GetImm(d));
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}
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else if ((gpr.IsImm(a) && MultiplyImmediate(gpr.GetImm(a), b, d, inst.Rc)) ||
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(gpr.IsImm(b) && MultiplyImmediate(gpr.GetImm(b), a, d, inst.Rc)))
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{
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// Code is generated inside MultiplyImmediate, nothing to be done here.
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}
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else
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{
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gpr.BindToRegister(d, d == a || d == b);
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