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Cleanup, preparations for Linux/Mac JIT (not yet working)

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git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@114 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
hrydgard
2008-07-31 20:22:35 +00:00
parent 60ac064e0c
commit d8fa3113ea
13 changed files with 279 additions and 133 deletions
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10
Source/Core/Core/Core.vcproj
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@ -1,7 +1,7 @@
<?xml version="1.0" encoding="Windows-1252"?>
<VisualStudioProject
ProjectType="Visual C++"
Version="8,00"
Version="8.00"
Name="Core"
ProjectGUID="{F0B874CB-4476-4199-9315-8343D05AE684}"
RootNamespace="Core"
@ -891,6 +891,14 @@
RelativePath=".\Src\PowerPC\Jit64\Jit_SystemRegisters.cpp"
>
</File>
<File
RelativePath=".\Src\PowerPC\Jit64\JitABI.cpp"
>
</File>
<File
RelativePath=".\Src\PowerPC\Jit64\JitABI.h"
>
</File>
<File
RelativePath=".\Src\PowerPC\Jit64\JitAsm.cpp"
>

37
Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp
View File

@ -14,18 +14,18 @@
// Official SVN repository and contact information can be found at
// http://code.google.com/p/dolphin-emu/
#include "Common.h"
#include "x64Emitter.h"
#include "ABI.h"
#include "../../HLE/HLE.h"
#include "../PowerPC.h"
#include "../../CoreTiming.h"
#include "../PowerPC.h"
#include "../PPCTables.h"
#include "../PPCAnalyst.h"
#include "x64Emitter.h"
#include "../../HW/Memmap.h"
#include "JitCache.h"
#include "JitAsm.h"
#include "Jit.h"
#include "JitAsm.h"
#include "JitCache.h"
#include "JitRegCache.h"
using namespace Gen;
@ -235,17 +235,8 @@ namespace Jit64
MOV(32, M(&PC), Imm32(js.compilerPC));
MOV(32, M(&NPC), Imm32(js.compilerPC+4));
}
#ifdef _M_X64
MOV(32,R(RCX), Imm32(_inst.hex));
CInterpreter::_interpreterInstruction instr = GetInterpreterOp(_inst);
CALL((void*)instr);
#elif _M_IX86
MOV(32,R(ECX), Imm32(_inst.hex));
PUSH(ECX);
CInterpreter::_interpreterInstruction instr = GetInterpreterOp(_inst);
CALL((void*)instr);
ADD(32,R(ESP), Imm8(4));
#endif
ABI_CallFunctionC((void*)instr, _inst.hex);
}
void Default(UGeckoInstruction _inst)
@ -256,24 +247,14 @@ namespace Jit64
void HLEFunction(UGeckoInstruction _inst)
{
FlushRegCaches();
#ifdef _M_X64
MOV(32, R(ECX), Imm32(js.compilerPC));
MOV(32, R(EDX), Imm32(_inst.hex));
#elif _M_IX86
PUSH(32, Imm32(_inst.hex));
PUSH(32, Imm32(js.compilerPC));
#endif
CALL((void *)&HLE::Execute);
#ifdef _M_IX86
ADD(32, R(ESP), Imm8(8));
#endif
ABI_CallFunctionCC((void*)&HLE::Execute, js.compilerPC, _inst.hex);
MOV(32, R(EAX), M(&NPC));
WriteExitDestInEAX(0);
}
void DoNothing(UGeckoInstruction _inst)
{
// Yup, just don't do anything.
}
bool ImHereDebug = false;

25
Source/Core/Core/Src/PowerPC/Jit64/JitAsm.cpp
View File

@ -22,6 +22,7 @@
#include "../../CoreTiming.h"
#include "MemoryUtil.h"
#include "ABI.h"
#include "Jit.h"
#include "JitCache.h"
@ -187,16 +188,9 @@ void Generate()
void Generate()
{
enterCode = AlignCode16();
//we only want to do this once
PUSH(RBX);
PUSH(RSI);
PUSH(RDI);
PUSH(R12);
PUSH(R13);
PUSH(R14);
PUSH(R15);
//TODO: Also preserve XMM0-3?
SUB(64, R(RSP), Imm8(0x20));
ABI_PushAllCalleeSavedRegsAndAdjustStack();
//INT3();
MOV(64, R(RBX), Imm64((u64)Memory::base));
@ -237,7 +231,7 @@ void Generate()
SetJumpTarget(notfound);
//Ok, no block, let's jit
MOV(32, R(ECX), M(&PowerPC::ppcState.pc));
MOV(32, R(ABI_PARAM1), M(&PowerPC::ppcState.pc));
CALL((void *)&Jit);
JMP(dispatcherNoCheck); // no point in special casing this, not the "fast path"
@ -273,14 +267,7 @@ void Generate()
J_CC(CC_Z, outerLoop, true);
//Landing pad for drec space
ADD(64, R(RSP), Imm8(0x20));
POP(R15);
POP(R14);
POP(R13);
POP(R12);
POP(RDI);
POP(RSI);
POP(RBX);
ABI_PopAllCalleeSavedRegsAndAdjustStack();
RET();
computeRc = AlignCode16();

8
Source/Core/Core/Src/PowerPC/Jit64/JitRegCache.cpp
View File

@ -30,7 +30,6 @@ namespace Jit64
{
GPRRegCache gpr;
FPURegCache fpr;
void RegCache::Start(PPCAnalyst::BlockRegStats &stats)
{
@ -245,13 +244,16 @@ namespace Jit64
RegCache::Start(stats);
}
const int *GPRRegCache::GetAllocationOrder(int &count)
{
static const int allocationOrder[] =
{
#ifdef _M_X64
#ifdef _WIN32
RSI, RDI, R12, R13, R14, R8, R9, RDX, R10, R11 //, RCX
#else
R12, R13, R14, R8, R9, RDX, R10, R11, RSI, RDI //, RCX
#endif
#elif _M_IX86
ESI, EDI, EBX, EBP, EDX //, RCX
#endif
@ -260,8 +262,6 @@ namespace Jit64
return allocationOrder;
}
const int *FPURegCache::GetAllocationOrder(int &count)
{
static const int allocationOrder[] =

2
Source/Core/Core/Src/PowerPC/Jit64/Jit_Integer.cpp
View File

@ -30,7 +30,7 @@ namespace Jit64
{
typedef u32 (*Operation)(u32 a, u32 b);
u32 Add(u32 a, u32 b) {return a+b;}
u32 Or(u32 a, u32 b) {return a|b;}
u32 Or (u32 a, u32 b) {return a|b;}
u32 And(u32 a, u32 b) {return a&b;}
u32 Xor(u32 a, u32 b) {return a^b;}

78
Source/Core/Core/Src/PowerPC/Jit64/Jit_LoadStore.cpp
View File

@ -26,6 +26,7 @@
#include "../../HW/Memmap.h"
#include "../PPCTables.h"
#include "x64Emitter.h"
#include "ABI.h"
#include "Jit.h"
#include "JitCache.h"
@ -46,47 +47,22 @@ namespace Jit64
static u64 GC_ALIGNED16(temp64);
static u32 GC_ALIGNED16(temp32);
#ifdef _M_X64
void SafeLoadECXtoEAX(int accessSize, s32 offset)
void SafeLoadRegToEAX(X64Reg reg, int accessSize, s32 offset)
{
if (offset)
ADD(32, R(ECX), Imm32((u32)offset));
TEST(32, R(ECX), Imm32(0x0C000000));
FixupBranch argh = J_CC(CC_NZ);
if (accessSize != 32)
XOR(32, R(EAX), R(EAX));
MOV(accessSize, R(EAX), MComplex(RBX, ECX, SCALE_1, 0));
if (accessSize == 32)
BSWAP(32, EAX);
else if (accessSize == 16)
{
BSWAP(32, EAX);
SHR(32, R(EAX), Imm8(16));
}
FixupBranch arg2 = J();
SetJumpTarget(argh);
switch (accessSize)
{
case 32: CALL((void *)&Memory::Read_U32); break;
case 16: CALL((void *)&Memory::Read_U16);break;
case 8: CALL((void *)&Memory::Read_U8);break;
}
SetJumpTarget(arg2);
}
#elif _M_IX86
void SafeLoadECXtoEAX(int accessSize, s32 offset)
{
if (offset)
ADD(32, R(ECX), Imm32((u32)offset));
TEST(32, R(ECX), Imm32(0x0C000000));
ADD(32, R(reg), Imm32((u32)offset));
TEST(32, R(reg), Imm32(0x0C000000));
FixupBranch argh = J_CC(CC_NZ);
if (accessSize != 32)
XOR(32, R(EAX), R(EAX));
#ifdef _M_IX86
AND(32, R(ECX), Imm32(Memory::MEMVIEW32_MASK));
MOV(accessSize, R(EAX), MDisp(ECX, (u32)Memory::base));
#else
MOV(accessSize, R(EAX), MComplex(RBX, reg, SCALE_1, 0));
#endif
if (accessSize == 32)
BSWAP(32,EAX);
BSWAP(32, EAX);
else if (accessSize == 16)
{
BSWAP(32, EAX);
@ -94,17 +70,14 @@ namespace Jit64
}
FixupBranch arg2 = J();
SetJumpTarget(argh);
PUSH(ECX);
switch (accessSize)
{
case 32: CALL(&Memory::Read_U32); break;
case 16: CALL(&Memory::Read_U16); break;
case 8: CALL(&Memory::Read_U8); break;
case 32: ABI_CallFunctionR((void *)&Memory::Read_U32, ECX); break;
case 16: ABI_CallFunctionR((void *)&Memory::Read_U16, ECX); break;
case 8: ABI_CallFunctionR((void *)&Memory::Read_U8, ECX); break;
}
ADD(32, R(ESP), Imm8(4));
SetJumpTarget(arg2);
}
#endif
void lbzx(UGeckoInstruction inst)
{
@ -117,7 +90,7 @@ namespace Jit64
MOV(32, R(ECX), gpr.R(b));
if (a)
ADD(32, R(ECX), gpr.R(a));
SafeLoadECXtoEAX(8, 0);
SafeLoadRegToEAX(ECX, 8, 0);
MOV(32, gpr.R(d), R(EAX));
gpr.UnlockAll();
}
@ -133,26 +106,15 @@ namespace Jit64
if (!Core::GetStartupParameter().bUseDualCore &&
inst.OPCD == 32 &&
(inst.hex & 0xFFFF0000)==0x800D0000 &&
Memory::ReadUnchecked_U32(js.compilerPC+4)==0x28000000 &&
Memory::ReadUnchecked_U32(js.compilerPC+8)==0x4182fff8)
(inst.hex & 0xFFFF0000) == 0x800D0000 &&
Memory::ReadUnchecked_U32(js.compilerPC+4) == 0x28000000 &&
Memory::ReadUnchecked_U32(js.compilerPC+8) == 0x4182fff8)
{
//PowerPC::downcount -= PowerPC::OnIdle(uAddress);
gpr.Flush(FLUSH_ALL);
fpr.Flush(FLUSH_ALL);
#ifdef _M_IX86
MOV(32, R(ECX), Imm32(PowerPC::ppcState.gpr[a] + (s32)(s16)inst.SIMM_16));
PUSH(ECX);
CALL((void *)&PowerPC::OnIdle);
ADD(32, R(ESP), Imm32(4));
#elif defined(_M_X64)
//INT3();
MOV(32, R(ECX), Imm32(PowerPC::ppcState.gpr[a] + (s32)(s16)inst.SIMM_16));
CALL((void *)&PowerPC::OnIdle);
#endif
MOV(32,M(&PowerPC::ppcState.pc), Imm32(js.compilerPC+12));
ABI_CallFunctionC((void *)&PowerPC::OnIdle, PowerPC::ppcState.gpr[a] + (s32)(s16)inst.SIMM_16);
MOV(32, M(&PowerPC::ppcState.pc), Imm32(js.compilerPC + 12));
JMP(Asm::testExceptions, true);
js.compilerPC += 8;
return;
}
@ -182,7 +144,7 @@ namespace Jit64
gpr.Flush(FLUSH_VOLATILE);
gpr.Lock(d, a);
MOV(32, R(ECX), gpr.R(a));
SafeLoadECXtoEAX(accessSize, offset);
SafeLoadRegToEAX(ECX, accessSize, offset);
gpr.LoadToX64(d, false, true);
MOV(32, gpr.R(d), R(EAX));
gpr.UnlockAll();
@ -235,7 +197,7 @@ namespace Jit64
else
#endif
{
SafeLoadECXtoEAX(32, offset);
SafeLoadRegToEAX(ECX, 32, offset);
}
MOV(32, M(&temp32), R(EAX));

2
Source/Core/Core/Src/PowerPC/Jit64/Jit_Paired.cpp
View File

@ -253,6 +253,4 @@ namespace Jit64
break;
}
}
}