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Jit64: fix invalid instruction encoding
This is a recent regression introduced in
c70dcf99dd
.
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parent
b7435be90a
commit
f6131e9703
@ -585,7 +585,7 @@ void Jit64::mcrxr(UGeckoInstruction inst)
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// Clear XER[0-3]
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// Clear XER[0-3]
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static_assert(PPCSTATE_OFF(xer_ca) + 1 == PPCSTATE_OFF(xer_so_ov));
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static_assert(PPCSTATE_OFF(xer_ca) + 1 == PPCSTATE_OFF(xer_so_ov));
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MOV(16, PPCSTATE(xer_ca), Imm8(0));
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MOV(16, PPCSTATE(xer_ca), Imm16(0));
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}
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}
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void Jit64::crXXX(UGeckoInstruction inst)
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void Jit64::crXXX(UGeckoInstruction inst)
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