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JitArm64: Use SBC/SBCS for emulating subfex

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SBC/SBCS does the same thing as subfex, except with the source
operands in the opposite order.
This commit is contained in:
JosJuice 2021-06-17 15:30:17 +02:00
parent 4e9e75f4c5
commit fac842021c
1 changed files with 7 additions and 10 deletions
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17
Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
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@ -994,7 +994,6 @@ void JitArm64::subfex(UGeckoInstruction inst)
} }
else else
{ {
ARM64Reg WA = js.carryFlag != CarryFlag::ConstantTrue ? gpr.GetReg() : ARM64Reg::INVALID_REG;
gpr.BindToRegister(d, d == a || d == b); gpr.BindToRegister(d, d == a || d == b);
switch (js.carryFlag) switch (js.carryFlag)
@ -1002,18 +1001,15 @@ void JitArm64::subfex(UGeckoInstruction inst)
case CarryFlag::InPPCState: case CarryFlag::InPPCState:
{ {
// upload the carry state // upload the carry state
ARM64Reg WA = gpr.GetReg();
LDRB(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(xer_ca)); LDRB(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(xer_ca));
CMP(WA, 1); CMP(WA, 1);
gpr.Unlock(WA);
[[fallthrough]]; [[fallthrough]];
} }
case CarryFlag::InHostCarry: case CarryFlag::InHostCarry:
{ {
if (gpr.IsImm(a)) CARRY_IF_NEEDED(SBC, SBCS, gpr.R(d), gpr.R(b), gpr.R(a));
MOVI2R(WA, u32(~gpr.GetImm(a)));
else
MVN(WA, gpr.R(a));
CARRY_IF_NEEDED(ADC, ADCS, gpr.R(d), WA, gpr.R(b));
ComputeCarry(); ComputeCarry();
break; break;
} }
@ -1025,19 +1021,20 @@ void JitArm64::subfex(UGeckoInstruction inst)
} }
case CarryFlag::ConstantFalse: case CarryFlag::ConstantFalse:
{ {
ARM64Reg WA = gpr.GetReg();
if (gpr.IsImm(a)) if (gpr.IsImm(a))
MOVI2R(WA, u32(~gpr.GetImm(a))); MOVI2R(WA, u32(~gpr.GetImm(a)));
else else
MVN(WA, gpr.R(a)); MVN(WA, gpr.R(a));
CARRY_IF_NEEDED(ADD, ADDS, gpr.R(d), WA, gpr.R(b)); CARRY_IF_NEEDED(ADD, ADDS, gpr.R(d), WA, gpr.R(b));
gpr.Unlock(WA);
ComputeCarry(); ComputeCarry();
break; break;
} }
} }
if (WA != ARM64Reg::INVALID_REG)
gpr.Unlock(WA);
} }
if (inst.Rc) if (inst.Rc)