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Core/DSPCore: Consolidation of register accesses(except for the four hw

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stacks), addition of a register cache(currently accumulators on 64bit only).

It feels a bit slower, but the numbers are about the same.
Caching accumulators doesn't change speed either.


git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6848 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
pierre
2011-01-14 18:00:25 +00:00
parent c99f0d03a4
commit fb1ebd8022
17 changed files with 1196 additions and 882 deletions
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6
Source/Core/Common/Src/x64Emitter.h
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@ -195,16 +195,16 @@ inline u32 PtrOffset(void* ptr, void* base) {
_assert_msg_(DYNA_REC, 0, "pointer offset out of range");
return 0;
}
return distance;
return (u32)distance;
#else
return (u32)ptr-(u32)base;
#endif
}
//usage: int a[]; ARRAY_OFFSET(a,10)
#define ARRAY_OFFSET(array,index) ((u64)&(array)[index]-(u64)&(array)[0])
#define ARRAY_OFFSET(array,index) ((u32)((u64)&(array)[index]-(u64)&(array)[0]))
//usage: struct {int e;} s; STRUCT_OFFSET(s,e)
#define STRUCT_OFFSET(str,elem) ((u64)&(str).elem-(u64)&(str))
#define STRUCT_OFFSET(str,elem) ((u32)((u64)&(str).elem-(u64)&(str)))
struct FixupBranch
{