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ROM dissasm "refresh" + RE + small fixes
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4938 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -126,6 +126,7 @@ void lsrn(const UDSPInstruction& opc);
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void asrn(const UDSPInstruction& opc);
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void dar(const UDSPInstruction& opc);
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void iar(const UDSPInstruction& opc);
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void xar(const UDSPInstruction& opc);
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void sbclr(const UDSPInstruction& opc);
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void sbset(const UDSPInstruction& opc);
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void mov(const UDSPInstruction& opc);
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@ -41,6 +41,7 @@ const DSPOPCTemplate opcodes[] =
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{"DAR", 0x0004, 0xfffc, DSPInterpreter::dar, nop, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false},
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{"IAR", 0x0008, 0xfffc, DSPInterpreter::iar, nop, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false},
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{"XAR", 0x000c, 0xfffc, DSPInterpreter::xar, nop, 1, 1, {{P_REG, 1, 0, 0, 0x0003}}, false},
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{"ADDARN", 0x0010, 0xfff0, DSPInterpreter::addarn, nop, 1, 2, {{P_REG, 1, 0, 0, 0x0003}, {P_REG04, 1, 0, 2, 0x000c}}, false},
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@ -129,6 +129,16 @@ void iar(const UDSPInstruction& opc)
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g_dsp.r[opc.hex & 0x3] = dsp_increment_addr_reg(opc.hex & 0x3);
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}
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// XAR $arD ?
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// 0000 0000 0000 11dd
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// $arD result somehow depends on $wrD
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// unknown atm
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// used in IPL ucode
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void xar(const UDSPInstruction& opc)
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{
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// u8 dreg = opc.hex & 0x3;
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}
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// SBCLR #I
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// 0001 0011 0000 0iii
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// bit of status register $sr. Bit number is calculated by adding 6 to
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