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Core/DSPCore: Reorganize register layout for accessing accumulators
(acc and ax) and product register with one read/write. Gives a minuscule speedup of not more than 4%. In exchange, breaks all your out-of-tree changes to dsp. Tests are not building again, yet. git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6680 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -123,7 +123,7 @@ void ret(const UDSPInstruction opc)
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// location.
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void rti(const UDSPInstruction opc)
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{
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g_dsp.r[DSP_REG_SR] = dsp_reg_load_stack(DSP_STACK_D);
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g_dsp._r.sr = dsp_reg_load_stack(DSP_STACK_D);
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g_dsp.pc = dsp_reg_load_stack(DSP_STACK_C);
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}
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@ -147,9 +147,9 @@ void halt(const UDSPInstruction opc)
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void HandleLoop()
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{
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// Handle looping hardware.
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const u16 rCallAddress = g_dsp.r[DSP_REG_ST0];
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const u16 rLoopAddress = g_dsp.r[DSP_REG_ST2];
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u16& rLoopCounter = g_dsp.r[DSP_REG_ST3];
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const u16 rCallAddress = g_dsp._r.st[0];
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const u16 rLoopAddress = g_dsp._r.st[2];
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u16& rLoopCounter = g_dsp._r.st[3];
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if (rLoopAddress > 0 && rLoopCounter > 0)
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{
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@ -184,7 +184,7 @@ void HandleLoop()
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void loop(const UDSPInstruction opc)
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{
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u16 reg = opc & 0x1f;
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u16 cnt = g_dsp.r[reg];
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u16 cnt = dsp_op_read_reg(reg);
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u16 loop_pc = g_dsp.pc;
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if (cnt)
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@ -229,7 +229,7 @@ void loopi(const UDSPInstruction opc)
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void bloop(const UDSPInstruction opc)
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{
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u16 reg = opc & 0x1f;
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u16 cnt = g_dsp.r[reg];
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u16 cnt = dsp_op_read_reg(reg);
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u16 loop_pc = dsp_fetch_code();
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if (cnt)
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