Core/DSPCore: Reorganize register layout for accessing accumulators

(acc and ax) and product register with one read/write.

Gives a minuscule speedup of not more than 4%. In exchange, breaks all
your out-of-tree changes to dsp. Tests are not building again, yet.


git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6680 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
pierre
2010-12-29 02:12:06 +00:00
parent 0059b0f44f
commit fc1db5eaa0
23 changed files with 1224 additions and 728 deletions

View File

@ -26,7 +26,7 @@ wxString CRegTable::GetValue(int row, int col)
switch (col)
{
case 0: return wxString::FromAscii(pdregname(row));
case 1: return wxString::Format(wxT("0x%04x"), g_dsp.r[row]);
case 1: return wxString::Format(wxT("0x%04x"), DSPCore_ReadRegister(row));
default: return wxString::FromAscii("");
}
}
@ -48,8 +48,8 @@ void CRegTable::UpdateCachedRegs()
for (int i = 0; i < 32; ++i)
{
m_CachedRegHasChanged[i] = (m_CachedRegs[i] != g_dsp.r[i]);
m_CachedRegs[i] = g_dsp.r[i];
m_CachedRegHasChanged[i] = (m_CachedRegs[i] != DSPCore_ReadRegister(i));
m_CachedRegs[i] = DSPCore_ReadRegister(i);
}
}