mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2025-07-25 07:09:48 -06:00
re-add enough of the wierdo audio buffer from MEM1 hackish-thing for wii sports to work...someone needs to convince me that this is actual behavior ;p
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4689 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
@ -60,10 +60,13 @@ enum
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DSP_MAIL_FROM_DSP_LO = 0x5006,
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DSP_MAIL_FROM_DSP_LO = 0x5006,
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DSP_CONTROL = 0x500A,
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DSP_CONTROL = 0x500A,
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DSP_INTERRUPT_CONTROL = 0x5010,
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DSP_INTERRUPT_CONTROL = 0x5010,
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AR_SIZE = 0x5012, // These names are a good guess at best
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AR_MODE = 0x5016, //
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AR_REFRESH = 0x501a, //
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AUDIO_DMA_START_HI = 0x5030,
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AUDIO_DMA_START_HI = 0x5030,
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AUDIO_DMA_START_LO = 0x5032,
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AUDIO_DMA_START_LO = 0x5032,
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AUDIO_DMA_CONTROL_LEN = 0x5036,
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AUDIO_DMA_CONTROL_LEN = 0x5036,
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AUDIO_DMA_BYTES_LEFT = 0x503A,
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AUDIO_DMA_BLOCKS_LEFT = 0x503A,
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AR_DMA_MMADDR_H = 0x5020,
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AR_DMA_MMADDR_H = 0x5020,
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AR_DMA_MMADDR_L = 0x5022,
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AR_DMA_MMADDR_L = 0x5022,
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AR_DMA_ARADDR_H = 0x5024,
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AR_DMA_ARADDR_H = 0x5024,
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@ -186,13 +189,12 @@ struct ARAMInfo
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// STATE_TO_SAVE
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// STATE_TO_SAVE
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static ARAMInfo g_ARAM;
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static ARAMInfo g_ARAM;
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DSPState g_dspState;
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static DSPState g_dspState;
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AudioDMA g_audioDMA;
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static AudioDMA g_audioDMA;
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ARDMA g_arDMA;
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static ARDMA g_arDMA;
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u16 g_AR_READY_FLAG = 0x01;
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static u16 g_AR_SIZE;
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u16 g_AR_MODE = 0x43; // 0x23 -> Zelda standard mode (standard ARAM access ??)
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static u16 g_AR_MODE;
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// 0x43 -> written by OSAudioInit at the UCode upload (upload UCode)
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static u16 g_AR_REFRESH;
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// 0x63 -> ARCheckSize Mode (access AR-registers ??) or no exception ??
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Common::PluginDSP *dsp_plugin;
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Common::PluginDSP *dsp_plugin;
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@ -205,8 +207,9 @@ void DoState(PointerWrap &p)
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p.Do(g_dspState);
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p.Do(g_dspState);
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p.Do(g_audioDMA);
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p.Do(g_audioDMA);
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p.Do(g_arDMA);
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p.Do(g_arDMA);
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p.Do(g_AR_READY_FLAG);
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p.Do(g_AR_SIZE);
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p.Do(g_AR_MODE);
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p.Do(g_AR_MODE);
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p.Do(g_AR_REFRESH);
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}
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}
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@ -239,9 +242,16 @@ void Init()
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{
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{
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g_ARAM.ptr = (u8 *)AllocateMemoryPages(g_ARAM.size);
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g_ARAM.ptr = (u8 *)AllocateMemoryPages(g_ARAM.size);
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}
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}
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g_audioDMA.AudioDMAControl.Hex = 0;
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g_audioDMA.AudioDMAControl.Hex = 0;
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g_dspState.DSPControl.Hex = 0;
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g_dspState.DSPControl.Hex = 0;
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g_dspState.DSPControl.DSPHalt = 1;
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g_dspState.DSPControl.DSPHalt = 1;
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g_AR_SIZE = 0;
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g_AR_MODE = 1; // Means that aram controller has finished initializing the mem
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g_AR_REFRESH = 0;
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et_GenerateDSPInterrupt = CoreTiming::RegisterEvent("DSPint", GenerateDSPInterrupt_Wrapper);
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et_GenerateDSPInterrupt = CoreTiming::RegisterEvent("DSPint", GenerateDSPInterrupt_Wrapper);
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}
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}
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@ -281,16 +291,16 @@ void Read16(u16& _uReturnValue, const u32 _iAddress)
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break;
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break;
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// AR_REGS 0x501x+
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// AR_REGS 0x501x+
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case 0x5012:
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case AR_SIZE:
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_uReturnValue = g_AR_SIZE;
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break;
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case AR_MODE:
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_uReturnValue = g_AR_MODE;
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_uReturnValue = g_AR_MODE;
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break;
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break;
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case 0x5016: // ready flag?
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case AR_REFRESH:
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_uReturnValue = g_AR_READY_FLAG;
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_uReturnValue = g_AR_REFRESH;
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break;
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case 0x501a:
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_uReturnValue = 0x000;
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break;
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break;
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case AR_DMA_MMADDR_H: _uReturnValue = g_arDMA.MMAddr >> 16; return;
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case AR_DMA_MMADDR_H: _uReturnValue = g_arDMA.MMAddr >> 16; return;
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@ -301,9 +311,7 @@ void Read16(u16& _uReturnValue, const u32 _iAddress)
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case AR_DMA_CNT_L: _uReturnValue = g_arDMA.Cnt.Hex & 0xFFFF; return;
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case AR_DMA_CNT_L: _uReturnValue = g_arDMA.Cnt.Hex & 0xFFFF; return;
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// DMA_REGS 0x5030+
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// DMA_REGS 0x5030+
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case AUDIO_DMA_BYTES_LEFT:
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case AUDIO_DMA_BLOCKS_LEFT:
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// Hmm. Would be stupid to ask for bytes left. Assume it wants
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// blocks left.
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_uReturnValue = g_audioDMA.BlocksLeft;
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_uReturnValue = g_audioDMA.BlocksLeft;
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break;
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break;
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@ -393,15 +401,22 @@ void Write16(const u16 _Value, const u32 _Address)
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// AR_REGS 0x501x+
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// AR_REGS 0x501x+
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// DMA back and forth between ARAM and RAM
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// DMA back and forth between ARAM and RAM
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case 0x5012:
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case AR_SIZE:
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g_AR_SIZE = _Value;
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// __OSInitAudioSystem sets to 0x43
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// __OSCheckSize sets = 0x20 | 3 (keeps upper bits)
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// 0x23 -> Zelda standard mode (standard ARAM access ??)
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// 0x63 -> ARCheckSize Mode (access AR-registers ??) or no exception ??
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// probably bitfield for: CAS latency/burst length/addressing mode/write mode
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// In any case, the aram driver should set it up :}
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break;
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case AR_MODE:
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g_AR_MODE = _Value;
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g_AR_MODE = _Value;
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break;
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break;
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case 0x5016:
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case AR_REFRESH:
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g_AR_READY_FLAG = 0x01; // write what ya want we set 0x01 (rdy flag ??)
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g_AR_REFRESH = _Value;
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break;
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case 0x501a:
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break;
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break;
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case AR_DMA_MMADDR_H:
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case AR_DMA_MMADDR_H:
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@ -443,7 +458,7 @@ void Write16(const u16 _Value, const u32 _Address)
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INFO_LOG(DSPINTERFACE, "AID DMA started - source address %08x, length %i blocks", g_audioDMA.SourceAddress, g_audioDMA.AudioDMAControl.NumBlocks);
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INFO_LOG(DSPINTERFACE, "AID DMA started - source address %08x, length %i blocks", g_audioDMA.SourceAddress, g_audioDMA.AudioDMAControl.NumBlocks);
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break;
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break;
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case AUDIO_DMA_BYTES_LEFT:
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case AUDIO_DMA_BLOCKS_LEFT:
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_dbg_assert_(DSPINTERFACE,0);
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_dbg_assert_(DSPINTERFACE,0);
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break;
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break;
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@ -622,22 +637,20 @@ void Update_ARAM_DMA()
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}
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}
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// This is how it works: The game has written sound to RAM, the DSP will read
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// (shuffle2) I still don't believe that this hack is actually needed... :(
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// it with this function. SamplePos in the plugin is double the value given
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// Maybe the wii sports ucode is processed incorrectly?
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// here because it works on a nibble level. In Wii addresses can either be for
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// MEM1 or MEM2, when it wants to read from MEM2 it adds 0x2000000 (in nibble
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// terms) to get up to the MEM2 hardware address. But in our case we use a
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// second pointer and adjust the value down to 0x00...
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// ^^^^Old comment, if it still applies, the R/W ARAM funcs below need to be changed
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u8 ReadARAM(u32 _iAddress)
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u8 ReadARAM(u32 _iAddress)
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{
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{
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//DEBUG_LOG(DSPINTERFACE, 0, "ARAM (r) 0x%08x", _iAddress);
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//NOTICE_LOG(DSPINTERFACE, "ReadARAM 0x%08x (0x%08x)", _iAddress, _iAddress & g_ARAM.mask);
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//_dbg_assert_(DSPINTERFACE,(_iAddress) < ARAM_SIZE);
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if (g_ARAM.wii_mode && _iAddress < Memory::RAM_SIZE)
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return g_ARAM.ptr[_iAddress & g_ARAM.mask];
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return Memory::Read_U8(_iAddress & Memory::RAM_MASK);
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else
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return g_ARAM.ptr[_iAddress & g_ARAM.mask];
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}
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}
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void WriteARAM(u8 value, u32 _uAddress)
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void WriteARAM(u8 value, u32 _uAddress)
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{
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{
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//NOTICE_LOG(DSPINTERFACE, "WriteARAM 0x%08x (0x%08x)", _uAddress, _uAddress & g_ARAM.mask);
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g_ARAM.ptr[_uAddress & g_ARAM.mask] = value;
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g_ARAM.ptr[_uAddress & g_ARAM.mask] = value;
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}
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}
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