Commit Graph

290 Commits

Author SHA1 Message Date
fe41dff228 Fix the master build. 2016-09-07 20:10:03 +12:00
7311cd8b6e Merge pull request #4137 from aldelaro5/memCheck-crash-fix
Fix a crash when adding the first memory check while the game is running
2016-09-07 14:19:19 +12:00
6493ea1eb9 MMU: Coding style fixes. 2016-09-06 08:43:31 +02:00
d557310371 Support for dynamic BAT modification (dynamic-bat).
Fundamentally, all this does is enforce the invariant that we always
translate effective addresses based on the current BAT registers and
page table before we do anything else with them.

This change can be logically divided into three parts.  The first part is
creating a table to represent the current BAT state, and keeping it up to
date (PowerPC::IBATUpdated, PowerPC::DBATUpdated, etc.).  This does
nothing by itself, but it's necessary for the other parts.

The second part (mostly in MMU.cpp) is simply removing all the hardcoded
checks for specific untranslated addresses, and consistently translating
addresses using the current BAT configuration. Very straightforward, but a
lot of code changes because we hardcoded assumptions all over the place.

The third part (mostly in Memmap.cpp) is making the fastmem arena reflect
the current BAT configuration.  We do this by redoing the mapping (calling
memmap()) based on the BAT table whenever it changes.

One additional minor change is that translation can fail in two ways:
either the segment is a direct store segment, or page table lookup failed.
The difference doesn't usually matter, but the difference affects cache
instructions, like dcbz.
2016-09-06 08:43:22 +02:00
5932ded806 Merge pull request #4183 from aldelaro5/if-simplification-slowmem
Simplify an if condition after PR #4078
2016-09-06 13:20:58 +12:00
173bdc766d Simplify an if condition after PR #4078 2016-09-05 13:01:02 -04:00
d29dae207a Merge pull request #4078 from comex/alwaysUseMemFuncs-for-write
Don't use the fast path when there are watchpoints enabled, for writes too
2016-09-06 04:55:17 +12:00
13506d3c12 x64Emitter: Generify ABI_CallFunction variants
Gets rid of the need to cast to void* just to use the functions.
2016-08-31 22:54:47 -04:00
0480ca48fb Add a thread safe variant of clearing the jit cache 2016-08-21 00:57:34 -04:00
bbc0f0c744 Jit: Check the FIFO on EIEIO instructions
The gather pipe optimization postpones checking the FIFO until the end
of the current block (or 32 bytes have been written). This is usually
safe, but is not correct across EIEIO instructions.

This is inferred from a block in NBA2K11 which synchronizes the FIFO
by writing a byte to it, executing eieio, and checking if PI_FIFO_WPTR
has changed. This is not currently an issue, but will become an issue
if the gather pipe optimization is applied to more stores.
2016-08-12 21:03:41 +10:00
85affe995e JitCache: Do not use block 0.
This ID is reserved for invalid blocks. So this block can't be invalidated.
2016-08-06 14:16:13 +02:00
814f29b25b JitCache: Implement block unlinking. 2016-08-06 11:41:39 +02:00
758e6406cd JIT: fix handling of PC in dispatcher/block cache.
Specifically, don't make any assumptions about what effective addresses
are used for code, and correctly handle changes to MSR.DR/MSR.IR.

(Split off from dynamic-bat.)
2016-08-06 11:41:39 +02:00
c51faa41f5 Don't use the fast path when there are watchpoints enabled, for writes too.
Also fold the check in both functionss into 'slowmem' rather than having
a separate test.  (jo.alwaysUseMemFuncs implies jo.memcheck anyway, as
makes sense.)
2016-08-01 20:40:00 -04:00
6834b4cb27 Revert "JitCache: Support for VMEM + MSR bits" 2016-07-27 11:15:25 +12:00
f9e5660106 JitCache: Implement block unlinking. 2016-07-16 09:24:10 +02:00
b81d008f92 JIT: fix handling of PC in dispatcher/block cache.
Specifically, don't make any assumptions about what effective addresses
are used for code, and correctly handle changes to MSR.DR/MSR.IR.

(Split off from dynamic-bat.)
2016-07-16 09:24:05 +02:00
20449ec91f Don't forget to initalize your variables. 2016-06-30 20:27:19 +12:00
b1296a7825 Refactor fastmem/trampoline code.
Simplication to avoid reading back the generated instructions, allowing
us to handle all possible cases.
2016-06-27 14:58:20 -06:00
4aa5291f54 Refactor the paired load/store code
Simplification/reduction of duplicated code. Detect other constant GQR values and inline loads (5-10% speedup) and do direct dispatch to AOT methods for stores.
2016-06-26 19:49:02 -06:00
3570c7f03a Reformat all the things. Have fun with merge conflicts. 2016-06-24 10:43:46 +02:00
08d45b9fea Merge pull request #3794 from EmptyChaos/frame-advance-race
Core: Add synchronization to state changes (Fix Frame Step and FIFO Player -  Issue 8718)
2016-05-22 15:19:16 -04:00
10e716c623 JitCommon: Pass jit block instead of host pointer on linking.
So the JIT may do more fancy stuff.
2016-05-14 00:04:58 +02:00
c1922783f8 Core: Threadsafety Synchronization Fixes (Frame Advance / FifoPlayer)
Fix Frame Advance and FifoPlayer pause/unpause/stop.

CPU::EnableStepping is not atomic but is called from multiple threads
which races and leaves the system in a random state; also instruction
stepping was unstable, m_StepEvent had an almost random value because
of the dual purpose it served which could cause races where CPU::Run
would SingleStep when it was supposed to be sleeping.

FifoPlayer never FinishStateMove()d which was causing it to deadlock.
Rather than partially reimplementing CPU::Run, just use CPUCoreBase
and then call CPU::Run(). More DRY and less likely to have weird bugs
specific to the player (i.e the previous freezing on pause/stop).

Refactor PowerPC::state into CPU since it manages the state of the
CPU Thread which is controlled by CPU, not PowerPC. This simplifies
the architecture somewhat and eliminates races that can be caused by
calling PowerPC state functions directly instead of using CPU's
(because they bypassed the EnableStepping lock).
2016-05-13 09:23:44 +10:00
c5b3a2efac Implement BLR Overflow handling for Windows. 2016-03-20 00:41:28 +13:00
b36b10fa78 Memmap: Make the MMIO mapping a unique_ptr 2016-02-15 00:02:00 -05:00
e455ca4d58 Merge pull request #3535 from RisingFog/cya_savestate_memleak
Properly clear JIT cache on save states
2016-01-20 18:02:25 +01:00
a7a744d33c Properly clear JIT cache on save states 2016-01-20 11:20:15 -05:00
f8fcceb99e Jit: Get rid of indirect includes 2016-01-12 00:12:36 -05:00
d9a16f7c9c Interpreter: Remove unnecessary includes from Interpreter.h
Previously the JIT code relied on indirect inclusion from this header,
this gets rid of that.
2016-01-10 18:51:12 -05:00
bddcdd9d94 Jit_Util: Replace two MDisp usages with MatR
Same thing, less to read.
2015-09-21 08:20:35 -04:00
00ffc47751 Jit_Util: Mark a class function as const 2015-09-17 00:21:50 -04:00
c6ea9eb7c3 JitCache: Remove unused define 2015-09-16 19:15:47 -04:00
8aac59418b JitCache: Get rid of pointer casts
Silences more ubsan runtime asserts
2015-09-16 06:25:48 -04:00
c5685ba53a Merge pull request #2972 from lioncash/align
General: Replace GC_ALIGN macros with alignas
2015-09-11 17:00:13 +00:00
19459e827f Partially revert "General: Toss out PRI macro usage" 2015-09-11 09:49:00 -04:00
48031eaff7 Merge pull request #2974 from Tilka/fprf
Jit64: fix errors in FPRF calculation
2015-09-08 18:59:22 +00:00
8ce04f9a65 General: Replace GC_ALIGN macros with alignas
Standard supported alignment -> out with compiler-specific.
2015-09-06 12:53:51 -04:00
be4caa3dc0 Merge pull request #2961 from lioncash/printf
General: Toss out PRI macro usage
2015-09-06 21:02:22 +12:00
8fdb013d54 General: Toss out PRI macro usage
Now that VS supports more printf specifiers, these aren't necessary
2015-09-05 16:02:35 -04:00
8f777cd839 Jit64: fix errors in FPRF calculation 2015-09-05 20:17:53 +02:00
72eed1aa82 JitCache: drop unused method 2015-09-05 12:40:14 +02:00
df19f11cb9 Jit_Util: Add missing override specifiers 2015-08-29 00:30:18 -04:00
ee4a12ffe2 Jit64: some byte-swapping changes 2015-08-26 05:41:18 +02:00
0d92c8fb89 Jit64: Optimize dcbx 2015-08-24 18:33:23 +02:00
6f34b27323 Jit64: implement dcbf + dcbi 2015-08-24 18:33:19 +02:00
78aa01e06e Jit64: Faster linking of continuous blocks
We compile the blocks as they are executed, so it's common
to link them continuously. We end with calling JMP after every
block, but often just with a distance of 0.
So just emitting NOPs instead also "calls" the next block, but
easier for the CPU.
2015-08-21 17:41:53 +02:00
f5a10bddee Jit64: use overloaded IsSimpleReg() where useful 2015-08-06 10:39:43 +02:00
89954d658c Jit64: drop needless casts 2015-07-18 22:33:42 +02:00
daa205990f Use emplace() instead of insert() where applicable for maps. 2015-06-28 19:52:40 -04:00