6593ba7ecc
XEmitter: add BLENDPS/BLENDPD
2015-05-21 12:33:36 +02:00
c2c31086ae
XEmitter: restructure WriteVEXOp wrappers
2015-05-17 18:44:56 +02:00
ae8efaa6a3
XEmitter: add VBLENDVPD and VCMPPD
2015-05-17 18:42:36 +02:00
18e9241637
XEmitter: rename WriteVex to WriteVEX
2015-05-17 09:35:53 +02:00
9e3f4df733
XEmitter: rename WriteRex to WriteREX
2015-05-17 09:35:53 +02:00
b3aaa46d42
Merge pull request #2088 from Sintendo/diecmp
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Emit 'TEST reg, reg' for 'CMP reg, 0' automatically
2015-04-23 16:34:23 -04:00
ad95454d04
Merge pull request #2223 from phire/imm
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Cleanup OpArg, make immediates more explicit.
2015-04-23 01:53:18 -04:00
c19482c9a3
Add function to emit CMP, or TEST when possible
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Also, a spelling mistake.
2015-03-22 17:22:27 +01:00
52aeab3d0e
Merge pull request #2240 from lioncash/emitter
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x64Emitter: Remove emitter pointer parameter from WriteNormalOp.
2015-03-20 22:09:11 -07:00
fab7add718
x64Emitter: Remove emitter pointer parameter from WriteNormalOp.
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It only ever passed the equivalent of the class' this pointer. May as well get rid of it.
2015-03-20 23:28:36 -04:00
9793fed742
XEmitter: add PUNPCKLQDQ
2015-03-18 12:09:06 +01:00
858ff69c01
Make OpArg.offset and operandReg private.
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Also cleaned up WriteRest function.
2015-03-17 18:49:30 +13:00
6262a9bcbe
Make immediates more explicit
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Instead of just casting OpArg::offset when needed, add some
accessor functions.
Also add some safety asserts to catch any mistakes.
2015-03-17 18:49:26 +13:00
75815b9b0d
Added a comment to document an issue with the codegen.
2015-01-24 16:08:26 +13:00
e80b657cf4
Move MOVBE wrappers directly into XEmitter class
2015-01-18 13:29:34 +01:00
eb13aa43fe
XEmitter: overload MOVBE()
2015-01-18 12:59:33 +01:00
1efa9b8b72
x64Emitter: add MOVLPS/MOVHPS
2015-01-07 11:23:52 +01:00
53b44ccb3a
x64ABI: enhance MOVTwo to take an offset
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This lets us merge displacements into MOVTwo in trampolines.
2015-01-05 10:45:58 -08:00
6e928d08a0
Jit64: clean up casts in memory operands
2014-12-07 20:23:27 +01:00
986d19b9d5
x64Emitter: fix bitwise AVX opcodes
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The reason this didn't break is that bitwise instructions like VPAND,
VANDPS, and VANDPD do the exact same thing. The only difference is the
data type they are intended for.
2014-12-06 22:28:03 +01:00
b25e1a2eb4
Various formatting and consistency fixes
2014-11-13 22:42:18 -05:00
6603f98d04
JIT: add 64-bit write support to FIFO functions
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Also fix 64-bit values passed to CallAC and otherwise correct immediate
handling in FIFO writes.
Fixes 007 Nightfire.
2014-11-09 21:24:30 -08:00
eb7f4dac50
Convert registersInUse to BitSet.
2014-10-25 16:57:25 -04:00
9ddbdeb39f
Merge pull request #995 from FioraAeterna/fma
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Add FMA support to emitter and use it in the JIT
2014-10-12 13:56:18 +11:00
9bca1a00d7
x64 emitter: Add some more missing ops (MOVDQA, MOVDQU, PSHUFHW)
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Also constify some pointers.
2014-10-10 18:30:05 +02:00
a2c46665c5
x64 emitter: Add a few missing instructions
2014-10-10 18:30:04 +02:00
019657cd93
X64Emitter: add FMA3 support
2014-10-07 18:21:07 -07:00
7a2dd3a3c6
x64Emitter: refactor, add some new AVX instructions
2014-10-03 10:05:10 -07:00
ac1fc9ad03
JIT+Emitter: support locking flags
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This helps us avoid accidentally clobbering flags between two instructions
when the flags are expected to be maintained. Dolphin will of course crash
immediately, but at least it will crash loudly and alert us of the mistake,
instead of forcing hours of bisecting to find the subtle way in which the JIT
has managed to sneak a flag-modifying instruction where there shouldn't be one.
2014-09-26 20:47:06 -07:00
3c49200b22
X64Emitter: add MOVHLPS/MOVLHPS
2014-09-18 17:57:27 -07:00
7ad9027593
Be pedantic about stack overflow on Linux and OS X.
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Add some magic to the fault handler to handle stack overflow due to BLR
optimization, and disable the optimization if fastmem is not enabled.
2014-09-17 20:08:09 -04:00
997c5c2d0e
x64Emitter: add LZCNT/TZCNT support and detection
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Also add a unit test.
2014-09-14 05:31:22 -07:00
5726e0cdfb
JIT: use XCHG in MOVTwo
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Roughly the same speed or slightly faster depending on CPU; mostly just cleaner
since we don't have to pass in a temp.
2014-09-10 22:17:38 -07:00
fbc64984ca
Include CommonTypes.h instead of Common.h.
2014-09-08 15:39:58 -04:00
4dc090643d
Remove ABI_AlignStack/ABI_RestoreStack and the noProlog option to ABI_CallFunctionRR.
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The latter being true was the only case where the former would do
anything, and it was never true. They became obsolete with x86's
removal.
2014-09-08 01:00:10 -04:00
2dafbfb3ef
Improve code and clarify parameters to ABI_Push/PopRegistersAndAdjustStack.
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- Factor common work into a helper function.
- Replace confusingly named "noProlog" with "rsp_alignment". Now that
x86 is not supported, we can just specify it explicitly as 8 for
clarity.
- Add the option to include more frame size, which I'll need later.
- Revert a change by magumagu in March which replaced MOVAPD with MOVUPD
on account of 32-bit Windows, since it's no longer supported. True,
apparently recent processors don't execute the former any faster if the
pointer is, in fact, aligned, but there's no point using MOVUPD for
something that's guaranteed to be aligned...
(I discovered that GenFrsqrte and GenFres were incorrectly passing false
to noProlog - they were, in fact, functions without prologs, the
original meaning of the parameter - which caused the previous change to
break. This is now fixed.)
2014-09-08 00:58:56 -04:00
67cdb6e07a
Factor code from ABI_CallFunctionRR and GetWriteTrampoline into a helper, and fix a special case.
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The special case is where the registers are actually to be swapped (i.e.
func(ABI_PARAM2, ABI_PARAM1); this was previously impossible but would
be ugly not to handle anyway.
2014-09-06 13:16:20 -04:00
5088a2b4e2
x64Emitter: add BMI1/BMI2 support
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TZCNT and LZCNT use a completely different encoding scheme, so they should
probably go in a separate patch.
Also add some tests.
2014-09-03 10:04:01 -07:00
a79ced2fc2
x64Emitter: Make it clear for both SSE to int conv that X64 regs are expected
2014-09-02 09:55:47 +02:00
c428c5999f
x64Emitter: UNPCKLPS/HPS are now tested
2014-09-02 09:53:00 +02:00
cc0b048c0b
x64Emitter: Support FLD/FSTP with 80 bits operands
2014-09-02 09:52:59 +02:00
9c4daac3a4
x64Emitter: RDTSC now without a typo'd name
2014-09-02 09:52:04 +02:00
88af225070
x64Emitter: Remove a declared function that is never implemented
2014-09-02 09:52:04 +02:00
ba4934b75e
Common: Clean up brace placements
2014-08-30 18:06:35 -04:00
f9d4ff0d5d
x64Emitter: add support for some missing CVT instructions
2014-08-27 20:15:42 -07:00
80be585fef
x64Emitter: remove redundant "Gen::"
2014-08-20 02:56:07 +02:00
a363f4fa3e
x64Emitter: make 'packed' parameter a bool
2014-08-20 02:54:30 +02:00
802b28daf9
x64Emitter: refactor to support longer opcodes
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Also add some new SSE4 opcodes.
2014-08-17 04:48:17 -07:00
0c24e1dcf2
Remove the rest of x86_32 support from Common.
2014-08-03 13:49:46 -05:00
6df48ed432
x64Emitter: add CVTTPD2DQ
2014-07-15 23:53:56 +02:00
