Commit Graph

4626 Commits

Author SHA1 Message Date
skidau
f5bbfa139d Merge pull request #1146 from RachelBryk/netplay-input-display
Make input display work properly with netplay.
2014-09-27 13:25:01 +10:00
Fiora
ba39c35f24 JIT: fix branch merging, take 2
NOT doesn't set flags.
2014-09-25 22:33:40 -07:00
skidau
30d77b38c5 Merge pull request #1127 from Sonicadvance1/QGR-BitField
Change the QGR union over to a BitField union.
2014-09-26 14:53:24 +10:00
skidau
9d746b89a2 Merge pull request #1162 from FioraAeterna/fixmerges
JIT: fix bugs with ComputeRC in branch merging patch
2014-09-26 14:46:53 +10:00
Fiora
f9ab25152c JIT: fix bugs with ComputeRC in branch merging patch
We really, really need to be sure the input to ComputeRC is a register.
2014-09-25 21:45:25 -07:00
skidau
146725f64a Merge pull request #1125 from Sintendo/fresjumps
Change fres/frsqrte jumps
2014-09-26 14:45:19 +10:00
comex
9cdd842080 Add a fake SContext definition for _M_GENERIC. 2014-09-25 18:47:34 -04:00
comex
8dccb0c743 Fix fastmem in JitIL after 755bd2c4.
That commit reorganized fastmem a bit; I wrote it before the patch to
support fastmem in JitIL landed, and forgot to edit it to account for
the fact.  Since JitILBase now derives from Jitx86Base, the HandleFault
override can just be removed.
2014-09-25 01:15:58 -04:00
Sintendo
29cca5c84f Change fres/frsqrte jumps 2014-09-24 21:58:01 +02:00
Fiora
bfab5f1e91 JIT: generic branch merging
Why merge just cmps and rlwinm when we can merge ALL the branches?
2014-09-24 12:34:18 -07:00
Ryan Houdek
76697922b4 Implement XER optimization on ARMv7 JIT core
Not completely optimized; there's room for improvement here.
2014-09-24 12:27:54 -07:00
Fiora
5fce109ce1 Reorganize carry to store flags separately instead of part of XER
Also correct behavior with regards to which bits in XER are treated as zero
based on a hwtest (probably doesn't affect any real games, but might as well
be correct).
2014-09-24 12:27:47 -07:00
skidau
788a719718 Merge pull request #1153 from skidau/twx-bindtoreg
Replaced KillImmediate with BindToRegister in the tw instruction.
2014-09-24 13:31:44 +10:00
skidau
a83792e914 Merge pull request #1074 from FioraAeterna/earlyflush
JIT: flush a register if it won't be used for the rest of the block
2014-09-24 13:30:02 +10:00
skidau
65eb0ff2fe Replaced KillImmediate with BindToRegister in the tw instruction. Fixes the error "WriteNormalOp - a1 and a2 cannot both be memory" which appeared on starting Monopoly Streets. 2014-09-23 18:00:41 +10:00
skidau
cbf102794e Merge pull request #1130 from Sonicadvance1/AArch64-jit-extXx
[AArch64] Implement instructions.
2014-09-23 13:52:30 +10:00
skidau
fb18d5376f Merge pull request #1142 from lioncash/linucks
Fix some warnings on Linux
2014-09-23 13:43:18 +10:00
Fiora
88f2fbe1a4 JIT: fix merged bclr with comex's BLR optimizations 2014-09-22 18:22:31 -07:00
Fiora
f103234e2b JIT: flush a register if it won't be used for the rest of the block
This should dramatically reduce code size in the case of blocks with
lots of branches, and certainly doesn't hurt elsewhere either.

This can probably be improved a good bit through smarter tracking of register
usage, e.g. discarding registers that are going to be overwritten, but this
is a good start and should help reduce code size and register pressure.
Unlike that sort of change, this is a "safe" patch; it only flushes registers,
which can't affect correctness, unlike actually discarding data.

As part of this, refactor PPCAnalyst to support distinguishing between
float and integer registers (to properly handle instructions that access
both, like floating-point loads and stores).

Also update every instruction in the interpreter flags table I could find
that didn't have all the correct flags.
2014-09-22 16:00:25 -07:00
Ryan Houdek
7f1185b941 Merge pull request #1140 from lioncash/android
Android: Silence a few warnings
2014-09-22 16:20:53 -05:00
Rachel Bryk
e4d71f36b1 Make input display work properly with netplay. 2014-09-22 12:56:35 -04:00
shuffle2
c617f324b2 Merge pull request #1143 from lioncash/exi
Core: Fix SIGABRT possibility in EXI_DeviceGecko
2014-09-22 00:16:34 -07:00
Lioncash
858d18a67e Core: Fix SIGABRT possibility in EXI_DeviceGecko
Fixes issue 7586
2014-09-21 21:50:30 -04:00
Lioncash
836ff6d506 Fix some warnings on Linux 2014-09-21 20:13:22 -04:00
Lioncash
ea40fdf21c Merge pull request #1132 from lioncash/osx
Fix building Dolphin on OSX without precompiled headers
2014-09-21 20:02:59 -04:00
Lioncash
dc79755303 Android: Silence a few warnings 2014-09-21 19:51:27 -04:00
Rachel Bryk
d933247c50 Remove an unused variable. 2014-09-21 19:40:18 -04:00
Ryan Houdek
1cb07ffc14 [AArch64] Implement twi and tw. 2014-09-21 14:17:04 -05:00
Ryan Houdek
078147d424 [AArch64] Implement mfmsr 2014-09-21 07:38:21 -05:00
Ryan Houdek
9530800fd0 [AArch64] Implement mtsprin and mfsprin 2014-09-21 07:38:16 -05:00
Ryan Houdek
2bcea19492 [AArch64] Implement mtsr and mfsr 2014-09-21 07:36:14 -05:00
Tony Wasserka
1d23c2ca8b GPU: Only load the relevant color components upon writes to the tev color registers.
The other two components need not be valid upon write, hence loading them results in glitches.

Fixes issue 6783.
2014-09-21 10:38:22 +02:00
Lioncash
a04a99251f Fix building Dolphin on OSX without precompiled headers 2014-09-21 00:37:47 -04:00
Ryan Houdek
0f8c5bda40 [AArch64] Implement mcrf. 2014-09-20 21:19:25 -05:00
Ryan Houdek
e708e8d5a0 [AArch64] Implement negx. 2014-09-20 16:17:16 -05:00
Ryan Houdek
75590a99cb [AArch64] Implement cntlzwx. 2014-09-20 14:52:56 -05:00
Ryan Houdek
76d2f331f0 [AArch64] Implement extshx and extsbx. 2014-09-20 14:46:53 -05:00
Ryan Houdek
9d7598266f Change the QGR union over to a BitField union.
Makes it easier to generate a QGR in my unit test, cleaner overall of course.
2014-09-20 13:15:44 -05:00
Ryan Houdek
a829e596c7 Merge pull request #1121 from FioraAeterna/fixfsel
JIT: fix fsel/ps_sel implementations for NaN input
2014-09-20 12:40:55 -05:00
Fiora
6043c790b6 JIT: fix indexed paired singles
I didn't realize the I and W fields were in a different place for these
variants.

This should fix Paper Mario and probably lots of other things I accidentally
broke.
2014-09-20 00:20:49 -07:00
skidau
ae17d91992 Merge pull request #1096 from RachelBryk/save-slots
Add hotkeys to select save state slots
2014-09-20 15:45:02 +10:00
Ryan Houdek
eb23882398 Merge pull request #1120 from rohit-n/muh-precompiled-headers
Fix build failing when disabling precompiled headers.
2014-09-19 17:43:42 -05:00
Rohit Nirmal
46057db37d Fix build failing when disabling precompiled headers. 2014-09-19 18:17:51 -04:00
Ryan Houdek
d7b40fa94c Merge pull request #1119 from FioraAeterna/bytereverse
JIT: support byte-reversed stores/loads
2014-09-19 15:54:27 -05:00
Ryan Houdek
bdca720e33 Fix some indention on AArch64 JIT. 2014-09-19 15:23:21 -05:00
Ryan Houdek
47e47891d4 [AArch64] Implement a bunch of integer instructions
16 new instructions for AArch64.
2014-09-19 15:23:21 -05:00
Ryan Houdek
5671530026 Merge pull request #1101 from FioraAeterna/fixfallbacks
JIT: simpler fallback conditions for load/store float
2014-09-19 15:23:01 -05:00
Ryan Houdek
5b4aa1d6d4 Merge pull request #1123 from FioraAeterna/eieio
JIT: change eieio and tlbsync to DoNothing
2014-09-19 15:19:41 -05:00
Ryan Houdek
7cc586d615 Merge pull request #1100 from FioraAeterna/psq_insts
JIT: implement remaining psq_l/st instruction variants
2014-09-19 15:16:44 -05:00
Fiora
0f53bba45a JIT: change eieio and tlbsync to DoNothing
The interpreter functions for these are no-ops anyways.
Also add some missing DoNothings to the ARM64 JIT.
2014-09-19 13:14:49 -07:00