Commit Graph

392 Commits

Author SHA1 Message Date
2025763420 Treewide: Adjust order of includes 2021-12-10 14:49:57 -08:00
824e0c00df JitCache: Remove irrelevant comment
It became irrelevant in 952dfcd610, when the define was removed; now, the code the comment is referring to is in JitRegister.cpp, and oprofile is controlled by cmake.
2021-12-10 13:59:38 -08:00
78bfd25964 Fix all uninitialized variable warnings (C26495) 2021-10-13 12:32:16 -07:00
9f525d69c8 Jit: Raise program exception on floating point exceptions
This is done entirely through interpreter fallbacks. It would
probably be possible to implement this using host exception
handlers instead, but I think it would be a lot of complexity
for a rarely used feature, so let's not do it for now.

For performance reasons, there are two settings for this feature:
One setting which does enables just what True Crime: New York City
needs and one setting which enables it all. The latter makes
almost all float instructions fall back to the interpreter.
2021-10-13 17:42:56 +02:00
34992f52c7 PowerPC/JitCache: Clear valid_block bits for long invalidations. 2021-09-07 23:14:20 +02:00
df1e59409b PowerPC: Handle translation if range given to InvalidateICache spans multiple BAT or Page Table pages. 2021-08-13 21:23:12 +02:00
4afbd87188 PowerPC: Fast path in InvalidateICache is only valid if the address is 32-byte aligned. 2021-08-12 19:27:25 +02:00
95fbd09691 PowerPC: Update variable name conventions and const-ness around calls to JitCache_TranslateAddress(). 2021-08-09 01:25:04 +02:00
ca55d599e8 Jit: Mark ValidBlockBitSet::Test as const 2021-07-27 11:11:30 +02:00
b84a0704cd Revert "Jit: Fix correctness issue in dcbf/dcbi/dcbst"
This reverts commit 66b992cfe4.

A new (additional) correctness issue was revealed in the old
AArch64 code when applying it on top of modern JitArm64:
LSR was being used when LSRV was intended. This commit uses LSRV.
2021-07-25 15:13:57 +02:00
e149ad4f0a treewide: convert GPLv2+ license info to SPDX tags
SPDX standardizes how source code conveys its copyright and licensing
information. See https://spdx.github.io/spdx-spec/1-rationale/ . SPDX
tags are adopted in many large projects, including things like the Linux
kernel.
2021-07-05 04:35:56 +02:00
bfe8b1068d JitArm64: Implement FPRF updates 2021-05-13 11:51:00 +02:00
51bf2dca21 Merge pull request #9675 from JosJuice/jit64-div-80000000
Jit64: Fix UB/infinite loop when compiling division by 0x80000000
2021-04-26 23:50:27 +02:00
7d4b87e7ae Jit64: Fix UB/infinite loop when compiling division by 0x80000000 2021-04-26 23:42:03 +02:00
ac679eb24d Merge pull request #9666 from leoetlino/jit-block-hashtable
Jit: Optimize block link queries by using hash tables
2021-04-25 18:45:41 +02:00
2a9d88739c JitArm64: Skip accurate single/double conversion if store-safe 2021-04-25 15:56:58 +02:00
018e247624 JitArm64: Optimize ConvertSingleToDouble, part 1 2021-04-25 15:56:19 +02:00
c812ab6a63 Jit: Optimize block link queries by using hash tables
Repeated erase() + iteration on a std::multimap is extremely slow.

Slow enough that it causes a 7 second long stutter during some
transitions in F-Zero X (a N64 VC game that triggers many, many icache
invalidations).

And slow enough that JitBaseBlockCache::DestroyBlock shows up on a
flame graph as taking >50% of total CPU time on the CPU-GPU thread:
https://i.imgur.com/vvqiFL6.png

This commit optimises those block link queries by replacing the
std::multimap (which is typically implemented with red-black trees)
with hash tables.

Master: https://i.imgur.com/vvqiFL6.png / 7s stutters
(starting from 5.0-2021 and with branch following disabled)

This commit: https://i.imgur.com/hAO74fy.png / ~0.7s stutters, which
is pretty close to 5.0 stable. (5.0-2021 introduced the performance
regression and it is especially noticeable when branch following
is disabled, which is the case for all N64 VC games since 5.0-8377.)
2021-04-24 17:20:59 +02:00
LC
15ebb1d9e4 Merge pull request #9566 from Sintendo/jit64divwx
Jit64: Optimize divwx
2021-03-22 14:40:02 -04:00
4c2cdb61df JitArm64: Constant carry flag optimizations
If we know at compile time that the PPC carry flag definitely
has a certain value, we can bake that value into the emitted code
and skip having to read from PPCState.
2021-03-19 22:40:19 +01:00
5bb8798df6 JitCommon: Signed 32-bit division magic constants
Add a function to calculate the magic constants required to optimize
signed 32-bit division.

Since this optimization is not exclusive to any particular architecture,
JitCommon seemed like a good place to put this.
2021-03-07 18:27:36 +01:00
66b992cfe4 Jit: Fix correctness issue in dcbf/dcbi/dcbst
PR #2663 added a Jit64 implementation of dcbX and a fast path to skip JIT cache invalidation. Unfortunately, there is a mismatch between address spaces in this optimization. It tests the effective address (with the top 3 bits cleared) against the valid block bitset which is intended to be indexed by physical address. While this works in the common case, it fails (for example) when the effective address is in the 7E... region (a.k.a. "fake VMEM"). This may also fall apart under more complex memory mapping scenarios requiring full MMU emulation.

The good news is that even without this fast path, the underlying call to JitInterface::InvalidateICache() still does very little work in the common case. It correctly translates the effective address to a physical address which it tests against the valid block bitset, skipping invalidation if it is not necessary. As such, the cost of removing the fast path should not be too high.

The Jit64 implementation is retained, though all it does now is emit a call. This is marginally more efficient than simple interpreter fallback, which involves an extra call. The JitArm64 implementation has also been fixed.

The game Happy Feet is fixed by this change, as it loads code in the 7E... address region and depends upon JIT cache invalidation in reponse to dcbf.

https://bugs.dolphin-emu.org/issues/12133
2021-01-23 15:17:09 -08:00
306a5e6990 Jit64: Keep track of free code regions and reuse space when possible. 2020-08-24 19:31:32 +02:00
bb75050f68 Jit: fix warning -Winvalid-offsetof
Remove the warning:
warning: offsetof within non-standard-layout type ‘JitBlock’ is conditionally-supported
JitBlock contains non-trival types now. Split the fields with trival
types that needs to be access from JIT code into JitBlockData structure.
2020-05-04 18:26:56 +02:00
709862b818 Merge pull request #8120 from MerryMage/cdts
Jit64: Make DoubleToSingle a common asm routine
2020-01-25 19:10:37 +00:00
c6019f9814 PowerPC/Jit: Create fastmem arena on init. 2019-12-28 13:41:57 +01:00
c4799e5977 Jit64: Make DoubleToSingle a common asm routine 2019-05-25 23:07:50 +01:00
2f490e44fb stop using g_jit outside of JitInterface
Replace g_jit in x86-64 ASM routines code by m_jit member reference
2018-12-15 01:58:58 +01:00
f564da7233 Jit_LoadStoreFloating: lfXXX 2018-10-28 17:57:45 +00:00
534db3b2ed Jit_LoadStore: lXXx 2018-10-28 17:57:44 +00:00
7aa305ea35 Profiler: Migrate global g_ProfileBlocks boolean to JitOptions
This global belongs in the JitOptions structure, as it's a conditional
setting (A.K.A. option) that changes the behavior of what the JIT does.

Plus it keeps the scope of the variable constrained to the general area
it's intended to be used and nothing further.
2018-08-27 11:30:19 -04:00
e81408588f JitCommon/JitCache: Make JitBlock's checkedEntry and normalEntry members non-const pointers
In both cases of the x64 and AArch64 JITs, these would have const casted
away from them, followed by them being placed within an emitter and
having breakpoint instructions written in them.

In this case, we shouldn't be using const period if we're writing to the
emitted data.
2018-08-27 10:23:22 -04:00
a4110ad958 PowerPC: Deduplicate Helper_Mask() code
We can share this across all implementations instead of duplicating it
in different ways.
2018-08-12 17:24:16 -04:00
1f49a9c87c Merge pull request #7116 from lioncash/log
JitCommon/JitBase: Rename x86-specific logging define to be platform agnostic
2018-06-14 15:00:34 +02:00
065aba43e2 JitBase: Remove unused rewriteStart data member from JitState 2018-06-14 08:46:34 -04:00
ace24c2932 JitCommon/JitBase: Rename x86-specific logging define to be platform agnostic
Given JitBase shouldn't include platform specifics, we can generalize this
preprocessor define and allow any JIT to use it to indicate that generated code should be logged.

While we're at it, also move these defines beneath the includes with the
rest of the defines.
2018-06-14 08:35:35 -04:00
a3f2941173 JitBase: Centralize location of code buffer
Given the code buffer is something truly common to all JIT
implementations, we can centralize it in the base class and avoid
duplicating it all over the place, while still allowing for differently
sized buffers.
2018-06-09 08:16:53 -04:00
986d644a01 JitAsmCommon: Make CommonAsmRoutinesBase a struct
This is just used as a means of carting around routines. It's not meant
to directly have functionality embedded within it--this is the job of
the inheriting data structure--so we can just make this a basic struct.

Particularly given all the data members were public to begin with.
2018-05-30 05:22:41 -04:00
f5f4c10fd1 JitAsmCommon: Amend member variable names for CommonAsmRoutinesBase 2018-05-30 05:22:36 -04:00
f4ec419929 SymbolDB: Namespace code under the Common namespace
Moves more common code into the Common namespace where it belongs.
2018-05-27 18:01:40 -04:00
b9aad3310e PowerPC: Move MMU-specifics from PowerPC.h to MMU.h
PowerPC.h at this point is pretty much a general glob of stuff, and it's
unfortunate, since it means pulling in a lot of unrelated header
dependencies and a bunch of other things that don't need to be seen by
things that just want to read memory.

Breaking this out into its own header keeps all the MMU-related stuff
together and also limits the amount of header dependencies being
included (the primary motivation for this being the former reason).
2018-05-17 19:18:55 -04:00
c880302c6b Prevent paired singles routines clobbering PC,SRR0
Paired single (ps) instructions can call asm_routines that try to update
PowerPC::ppcState.pc. At the time the asm_routine is built, emulation has
not started and the PC is invalid (0). If the ps instruction causes an
exception (e.g. DSI), SRR0 gets clobbered with the invalid PC.

This change makes the relevant ps instructions store PC before calling out
to asm_routines, and prevents the asm_routine from trying to store PC
itself.
2018-05-14 20:49:13 -04:00
ffcf107dd2 PowerPC: Make the PowerPCState's msr member variable a UReg_MSR instance
Gets rid of the need to construct UReg_MSR values around the the actual
member in order to query information from it (without using shifts and
masks). This makes it more concise in some areas, while helping with
readability in some other places (such as copying the ILE bit to the LE
bit in the exception checking functions).
2018-05-05 17:59:30 -04:00
e0165a62da JitBase: Remove use of the JIT global in Dispatch() and JitTrampoline()
Trims down a few more uses of the global variable by just passing the
JIT instance we're dispatching or trampolining with as a parameter.
2018-03-21 04:41:30 -04:00
51cfeb8c7d JitBase: Ensure JitOptions and JitState instances are consistently initialized
Ensures that upon construction of a JitBase instance, that all
underlying members within the option and state structs are guaranteed
to be initialized.

This prevents potentially using a member uninitialized in some form.
2018-03-19 15:58:32 -04:00
36ad887a19 Jit64: Inline GP writes.
As we're down to 4 instructions now, it is always worth to inline those writes.
2017-11-18 14:45:09 +01:00
8cd8e9d905 JIT: Don't always look up symbols for blocks
With tons of symbols, this results in noticeable stuttering, so
skip lookups if the perf dir option isn't set anyway.
2017-09-10 11:42:12 +02:00
958b75b707 JitCommon: Restructure the profiler calls. 2017-09-02 13:05:58 +02:00
f6c21e002b General: Remove unnecessary semicolons 2017-07-30 16:39:53 -04:00
9a2bef97da JitCache: use SymbolDB names as JIT block names 2017-06-18 06:58:44 +01:00