ac54c6a4e2
Make address translation respect the CPU translation mode.
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The PowerPC CPU has bits in MSR (DR and IR) which control whether
addresses are translated. We should respect these instead of mixing
physical addresses and translated addresses into the same address space.
This is mostly mass-renaming calls to memory accesses APIs from places
which expect address translation to use a different version from those
which do not expect address translation.
This does very little on its own, but it's the first step to a correct BAT
implementation.
2015-02-11 13:56:22 -08:00
e07679114b
Use emplace_* functions where in-place construction is preferable
2015-02-04 11:39:08 -05:00
a277172b49
Merge pull request #1980 from Sonicadvance1/AArch64_more_optimizations
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[AArch64] Minor optimizations
2015-01-30 08:33:19 -06:00
1c388b6c37
Fix clang on x86_64.
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If we are compiling in the CRC32 hash, clang has an issue with casting a s32 to a u64.
Change our lens argument to a unsigned integer to fix the issue.
2015-01-29 01:55:20 -06:00
8c53b88cc3
[AArch64] Implement a way to call lambdas in the emitter
2015-01-29 01:50:11 -06:00
a4adfe194a
JitRegister: overload Register with a [start,end) variant
2015-01-28 09:50:19 +01:00
a957f93532
Use printf-like format in JitRegister::Register
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The API is cleaner (no more magic default parameter) and more
extensible like this.
2015-01-28 09:47:08 +01:00
53a9df10f9
Merge pull request #1817 from Armada651/custom-anaglyph
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PostProcessing: Add support for user-supplied anaglyph shaders.
2015-01-26 11:08:29 +01:00
c340a324bc
Merge pull request #1947 from Sonicadvance1/AArch64_tu_tl_merge
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[AArch64] Implement TU/TL merging.
2015-01-25 23:07:32 -06:00
f24c466e7e
[AArch64] Fix AArch64 instruction encoding.
2015-01-25 17:26:18 -06:00
262c3b19ec
PostProcessing: Add support for user-supplied anaglyph shaders.
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There are lots of different anaglyph glasses out there and there may be even more creative uses for stereoscopic post-processing shaders.
2015-01-25 22:07:03 +01:00
0aef1d27aa
Merge pull request #1933 from magumagu/intellisense-error-fix
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Fix Intellisense error spam on Visual Studio.
2015-01-25 15:44:30 +11:00
3aa3002010
Fix Intellisense error spam on Visual Studio.
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Intellisense doesn't like defines in PCH files, and it doesn't like the deleted
constructor for BitField. (I think it's being overly strict about the
"must have no non-default constructors" rule for classes in unions.)
2015-01-23 19:15:25 -08:00
75815b9b0d
Added a comment to document an issue with the codegen.
2015-01-24 16:08:26 +13:00
6470227a39
[AArch64] Minor fix in the UMULH/SMULH.
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These two instructions ignore the register encoded in to RA.
2015-01-22 18:08:49 -06:00
a353ead3cb
CustomTexture: Use always safe texture hash
2015-01-21 21:22:55 +01:00
80e6367e46
Merge pull request #1869 from Stevoisiak/GeneralConsistency
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Minor consistency changes
2015-01-21 13:46:53 -06:00
217c2c9d6a
[AArch64] Add some more scalar VFP ops to the emitter.
2015-01-20 16:34:32 -06:00
cb967a6ff2
Merge pull request #1911 from Sonicadvance1/AArch64_paired_loadstores
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[AArch64] Implements paired loadstores
2015-01-20 16:33:08 -06:00
e35766cbcd
Fix building with PCH disabled.
2015-01-20 17:01:37 +00:00
7376956c92
Merge pull request #1912 from Sonicadvance1/Android_remove_workaround
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[Android] Remove posix_memalign workaround.
2015-01-19 15:36:17 -06:00
dc95ea2ce6
Minor fix with psq_st{u,}x disassembly.
2015-01-19 10:12:23 -06:00
ed58b1fd5b
Merge pull request #1913 from Sonicadvance1/fix_paired_store_disassembly
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Fixes disassembly of paired store instructions.
2015-01-18 23:27:34 -05:00
596d3fd5f2
Fixes disassembly of paired store instructions.
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Someone thought it would be a good idea to have the location as the first argument on the instruction.
Changed it to how it is supposed to be disassembled.
2015-01-18 16:37:43 -06:00
08e50ec6dd
[Android] Remove posix_memalign workaround.
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Google fixed the issue of posix_memalign not being available. It now works fine in r10d of the NDK.
2015-01-18 16:34:42 -06:00
8d5947efac
[AArch64] Emitter improvements.
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Adds a bunch of new instructions to the emitter.
2015-01-18 16:25:40 -06:00
e80b657cf4
Move MOVBE wrappers directly into XEmitter class
2015-01-18 13:29:34 +01:00
eb13aa43fe
XEmitter: overload MOVBE()
2015-01-18 12:59:33 +01:00
cb86db7b68
Minor consistency changes
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Mostly small changes, like capitalization and spelling
2015-01-12 15:18:18 -05:00
52b1a54597
MemoryUtil: mention Valgrind in mmap error message
2015-01-12 02:22:05 +01:00
f98359ef5c
MemoryUtil: add comment for Valgrind
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Valgrind doesn't support the mmap() flag MAP_32BIT. Adding a simple
CMake option would force a recompile, so just add this comment.
2015-01-12 02:22:05 +01:00
ca3b3adb50
Merge pull request #1849 from Sonicadvance1/AArch64_Emitter_Improvements
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[AArch64] Emitter Improvements and additions.
2015-01-11 07:08:02 -06:00
5b825e9091
StringUtils: use C locale instead of .1252
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Fixes regression on Linux.
2015-01-11 00:15:57 -08:00
394257f33b
Merge pull request #1798 from FioraAeterna/overclock
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Support overclocking and underclocking the Gamecube CPU
2015-01-11 06:12:27 +01:00
8237004448
JIT: optimize for the common case of unquantized psq_l/st
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Optimistically assume used GQRs are 0 in blocks that only use one GQR, and
bail at the start of the block and recompile if that assumption fails.
Many games use almost entirely unquantized stores (e.g. Rebel Strike, Sonic
Colors), so this will likely be a big performance improvement across the board
for games with heavy use of paired singles.
2015-01-10 14:14:43 -08:00
c2c950108d
Support overclocking and underclocking the Gamecube CPU
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Won't work with all games, but provides a nice way to spend extra CPU to make
a variable framerate game faster (e.g. Spyro or The Last Story), or to make
a game use less CPU at the cost of a lower framerate (e.g. Rogue Leader).
2015-01-10 10:46:38 -08:00
c511ee763a
[AArch64] Add the float emitter.
2015-01-08 19:55:31 -06:00
6bc274a968
Merge pull request #1844 from Tilka/sse_mov
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x64Emitter: fix MOVLPD/MOVHPD
2015-01-08 19:04:14 -06:00
f0f8384639
Merge pull request #1785 from degasus/custom_texture
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VideoCommon: Custom texture handling
2015-01-08 13:29:45 +01:00
5a0133c478
[AArch64] Add a few more VFP register helpers.
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Renames Is128Bit to IsQuad to line up more with the other helpers.
2015-01-07 13:05:55 -06:00
2b4f1aed40
[AArch64] Minor shifted register adjustment.
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If we have a shift amount that is the full length of the source register then we have an invalid instruction.
This can happen when dealing with a couple of PowerPC instructions.
This same adjustment is already in the ARMv7 emitter.
2015-01-07 13:03:51 -06:00
0a23ca9461
[AArch64] Add MUL/MNEG instruction aliases to the emitter.
2015-01-07 13:03:01 -06:00
d2eaba5cb7
[AArch64] Minor MOVI2R improvement.
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Use the ZR for both input arguments in the case the immediate is the maximum immediate value.
This allows it to be aliased to MVN when disassembling.
2015-01-07 13:00:39 -06:00
8dba84dd7c
[AArch64] Fix 8 & 16 bit loadstore indexes.
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I wasn't bit shifting correctly for 8 and 16bit loadstores.
2015-01-07 12:58:37 -06:00
f4f59ea71e
[AArch64] Fix ADDS/SUBS emitter functions.
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These weren't emitting the flag bit. So they were regular ADD and SUB emitters.
2015-01-07 12:56:45 -06:00
1efa9b8b72
x64Emitter: add MOVLPS/MOVHPS
2015-01-07 11:23:52 +01:00
3daa6ab259
x64Emitter: fix MOVLPD/MOVHPD
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These instructions were using the wrong prefix which turned
MOVLPD(reg, mem) into MOVDDUP(reg, mem) and made the rest of them
invalid.
2015-01-07 11:23:52 +01:00
89b7f1057f
Merge pull request #1804 from FioraAeterna/fastermmu2_master
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MMU: various improvements, bugfixes, optimizations
2015-01-07 00:49:58 +01:00
d8d4c94e07
Merge pull request #1819 from Tilka/cmake
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CMake: simplify some expressions
2015-01-06 09:27:59 +01:00
53b44ccb3a
x64ABI: enhance MOVTwo to take an offset
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This lets us merge displacements into MOVTwo in trampolines.
2015-01-05 10:45:58 -08:00
