Commit Graph

76 Commits

Author SHA1 Message Date
d40022d6d0 JitInterface: Move explanatory comment of ClearSafe() to the function's prototype
Puts the comment in the header where it's more likely to be seen
initially. We can also remove the TODO, given doing nothing or returning
an error is what is generally done for the JIT interface if the JIT
instance isn't valid.
2018-08-27 13:04:05 -04:00
7aa305ea35 Profiler: Migrate global g_ProfileBlocks boolean to JitOptions
This global belongs in the JitOptions structure, as it's a conditional
setting (A.K.A. option) that changes the behavior of what the JIT does.

Plus it keeps the scope of the variable constrained to the general area
it's intended to be used and nothing further.
2018-08-27 11:30:19 -04:00
6f473b96d0 PowerPC: Convert CPUCore enum into an enum class
Makes the enum values strongly-typed and prevents the identifiers from
polluting the PowerPC namespace. This also cleans up the parameters of
some functions where we were accepting an ambiguous int type and
expecting the correct values to be passed in.

Now those parameters accept a PowerPC::CPUCore type only, making it
immediately obvious which values should be passed in. It also turns out
we were storing these core types into other structures as plain ints,
which have also been corrected.

As this type is used directly with the configuration code, we need to
provide our own overloaded insertion (<<) and extraction (>>) operators
in order to make it compatible with it. These are fairly trivial to
implement, so there's no issue here.

A minor adjustment to TryParse() was required, as our generic function
was doing the following:

N tmp = 0;

which is problematic, as custom types may not be able to have that
assignment performed (e.g. strongly-typed enums), so we change this to:

N tmp;

which is sufficient, as the value is attempted to be initialized
immediately under that statement.
2018-06-15 10:27:59 -04:00
792446e1da When CPU core is invalid, fall back to JIT instead of interpreter
This might happen if someone moves settings between e.g. a PC and
an Android device, or if someone was using JITIL and updates Dolphin.

I also made the panic alert a bit more explanatory.
2018-05-26 14:19:53 +02:00
b9aad3310e PowerPC: Move MMU-specifics from PowerPC.h to MMU.h
PowerPC.h at this point is pretty much a general glob of stuff, and it's
unfortunate, since it means pulling in a lot of unrelated header
dependencies and a bunch of other things that don't need to be seen by
things that just want to read memory.

Breaking this out into its own header keeps all the MMU-related stuff
together and also limits the amount of header dependencies being
included (the primary motivation for this being the former reason).
2018-05-17 19:18:55 -04:00
ffcf107dd2 PowerPC: Make the PowerPCState's msr member variable a UReg_MSR instance
Gets rid of the need to construct UReg_MSR values around the the actual
member in order to query information from it (without using shifts and
masks). This makes it more concise in some areas, while helping with
readability in some other places (such as copying the ILE bit to the LE
bit in the exception checking functions).
2018-05-05 17:59:30 -04:00
a0f943178b Profiler: Move BlockStat and ProfileStats structures into the Profiler namespace
These should be part of the namespaced API and not be sitting in the
global namespace.
2018-04-08 22:29:48 -04:00
2381aeecc3 PPCTables: Namespace all exposed functions
It's somewhat inconsistent to have two straggler functions outside the
namespace.
2018-03-24 16:46:12 -04:00
22aba8c56d Merge pull request #6468 from lioncash/downcast
JitInterface: Remove a downcast within InitJitCore
2018-03-19 09:00:56 +01:00
14b204a9bb JitInterface: Remove a downcast within InitJitCore
This isn't necessary as JitBase is already within the type hierarchy that
CPUCoreBase is.
2018-03-19 03:13:16 -04:00
6428cee939 PPCTables: Make the op type enum an enum class
Reduces the amount of identifiers dropped into the global namespace when
the PPCTables header is included.
2018-03-18 18:53:58 -04:00
958b75b707 JitCommon: Restructure the profiler calls. 2017-09-02 13:05:58 +02:00
f09ceaa735 Move IOFile to a separate file
Reduces the number of files that need to be recompiled
when making changes to FileUtil.h.
2017-06-15 21:33:50 +02:00
b676edd80c Core: include what you use
Eliminates a swath of indirectly included standard headers
2017-06-07 01:20:48 -04:00
256a0cf4db Remove JITIL 2017-05-19 22:21:07 +02:00
c6200a5b07 JitInterface: Convert includes into forward declarations where applicable 2017-03-02 13:20:29 -05:00
ff0f60c9f9 JitInterface: Amend ExceptionType enum value names
Since ExceptionType is an enum class, its name already acts like the
common prefix.
2017-02-21 15:40:00 -05:00
1ce1304d0f CPU Backends: Make each CPU backend responsible for initializing its own
instruction tables

Previously, all of the internals that handled how the instruction tables
are initialized were exposed externally. However, this can all be made
private to each CPU backend.

If each backend has an Init() function, then this is where the instruction
tables should be initialized, it shouldn't be the responsibility of
external code to ensure internal validity.

This allows for getting rid of all the table initialization shenanigans
within JitInterface and PPCTables.
2017-02-10 13:08:14 -05:00
e07383a783 Core: Convert State enum into an enum class 2017-02-05 08:32:23 -05:00
7e850361fb JitCache: Add a helper function to iterate over all blocks. 2017-01-12 20:23:14 +01:00
d3aa8c8080 JitCache: Return a pointer in GetBlockFromStartAddress. 2017-01-12 20:23:14 +01:00
eddccb3891 CachedInterpreter: Move to its own directory 2017-01-09 04:43:05 -05:00
8bef7259e3 Add the g_ prefix to the jit global
Jan 04 22:55:01 <leoetlino>   fwiw, it looks like there are new warnings in the RegCache code
Jan 04 22:55:04 <leoetlino>   Source/Core/Core/PowerPC/Jit64/FPURegCache.cpp:13:33: warning: declaration shadows a variable in the global namespace [-Wshadow]
Jan 04 22:56:19 <@Lioncash>   yeah, the jit global should have a g_ prefix.

This fixes shadowing warnings and adds the g_ prefix to a global.
2017-01-07 23:19:49 +01:00
72e3f1ecec Remove unnecessary ConfigManager includes
Making changes to ConfigManager.h has always been a pain, because
it means rebuilding half of Dolphin, since a lot of files depend on
and include this header.

However, it turns out some includes are unnecessary. This commit
removes ConfigManager includes from files which don't contain
SConfig or GPUDeterminismMode or GPU_DETERMINISM (which means the
ConfigManager include is not used).

(I've also had to get rid of some indirect includes.)
2016-11-27 22:38:38 +01:00
789975e350 Jit: FIFO optimization improvements
This introduces speculative constants, allowing FIFO writes to be
optimized in more places.

It also clarifies the guarantees of the FIFO optimization, changing
the location of some of the checks and potentially avoiding redundant
checks.
2016-08-15 20:09:52 +10:00
758e6406cd JIT: fix handling of PC in dispatcher/block cache.
Specifically, don't make any assumptions about what effective addresses
are used for code, and correctly handle changes to MSR.DR/MSR.IR.

(Split off from dynamic-bat.)
2016-08-06 11:41:39 +02:00
6834b4cb27 Revert "JitCache: Support for VMEM + MSR bits" 2016-07-27 11:15:25 +12:00
b81d008f92 JIT: fix handling of PC in dispatcher/block cache.
Specifically, don't make any assumptions about what effective addresses
are used for code, and correctly handle changes to MSR.DR/MSR.IR.

(Split off from dynamic-bat.)
2016-07-16 09:24:05 +02:00
1c28a27ee4 Delete dead variable named bFakeVMEM.
(There's another bFakeVMEM in Memmap.h.)
2016-06-25 23:05:55 -07:00
3570c7f03a Reformat all the things. Have fun with merge conflicts. 2016-06-24 10:43:46 +02:00
c5b3a2efac Implement BLR Overflow handling for Windows. 2016-03-20 00:41:28 +13:00
e455ca4d58 Merge pull request #3535 from RisingFog/cya_savestate_memleak
Properly clear JIT cache on save states
2016-01-20 18:02:25 +01:00
a7a744d33c Properly clear JIT cache on save states 2016-01-20 11:20:15 -05:00
f8fcceb99e Jit: Get rid of indirect includes 2016-01-12 00:12:36 -05:00
986108715d JitInterface: Get rid of a global variable 2016-01-09 14:57:50 -05:00
19459e827f Partially revert "General: Toss out PRI macro usage" 2015-09-11 09:49:00 -04:00
5d7f834cde Add run count to the JIT profile information 2015-09-08 11:09:52 -05:00
8fdb013d54 General: Toss out PRI macro usage
Now that VS supports more printf specifiers, these aren't necessary
2015-09-05 16:02:35 -04:00
8db43501d5 JitInterface: Fix null checking in GetProfileResults
Technically a null pointer dereference can occur here.
2015-08-14 18:51:54 -04:00
8adca82cc6 JitInterface: fix disassembly entry point
This adds the downcount check code to the disassembly text and removes the
bogus instructions at the end.
2015-08-06 10:18:46 +02:00
1c9b5efb4c CachedInterpreter: New kind of jit which always fallback to interpreter. 2015-07-22 23:19:20 +02:00
2b2af12466 Prevent nullptr dereference on a crash with no JIT present
JitInterface::HandleFault would dereference jit which is NULL, causing a stack overflow through infinite exception recursion.
2015-07-05 14:24:51 +02:00
c375111076 Options: merge SCoreStartupParameter into SConfig 2015-06-12 19:07:45 +02:00
59e2225f7d Remove ARMv7 support. 2015-06-07 22:44:13 -05:00
d0ae3f7d24 Break out the disassembler code from the WXWidgets UI.
This cleans up some of the code between core and UI for disassembling and dumping code blocks.
Should help the QT UI in bringing up its debug UI since it won't have to deal with this garbage now.
2015-05-31 18:16:59 -05:00
0c5f5c4519 Merge pull request #2394 from Sonicadvance1/android_block_profiling_api
[Android] Block profiling JNI interface
2015-05-25 23:06:37 -04:00
cefcb0ace9 Update license headers to GPLv2+ 2015-05-25 13:22:31 +02:00
0da086e389 Make sure the JitInterface's WriteProfileResults instruction pauses and resumes the CPU core. 2015-05-10 20:02:25 -05:00
a60d3306b1 PowerPC: Get rid of magic numbers related to interp/JIT initialization. 2015-02-19 12:16:53 -05:00
ac54c6a4e2 Make address translation respect the CPU translation mode.
The PowerPC CPU has bits in MSR (DR and IR) which control whether
addresses are translated. We should respect these instead of mixing
physical addresses and translated addresses into the same address space.

This is mostly mass-renaming calls to memory accesses APIs from places
which expect address translation to use a different version from those
which do not expect address translation.

This does very little on its own, but it's the first step to a correct BAT
implementation.
2015-02-11 13:56:22 -08:00