Commit Graph

428 Commits

Author SHA1 Message Date
f1c1c6ded6 JitCache: Fix potentially dangling pointer to fast block map.
Whenever JitBaseBlockCache::Clear() got called, it threw away the memory mapping for the fast block map and created a new one. This new mapping typically got mapped at the same address at the old one, but this is not guaranteed. The pointer to the mapping gets embedded in the generated dispatcher code in Jit64AsmRoutineManager::Generate(), which is only called once on game boot, so if the new mapping ended up at a different address than the old one, the pointer in the ASM pointed at garbage, leading to a crash.

This fixes the issue by guaranteeing that the new mapping is mapped at the same address.
2023-09-02 04:03:22 +02:00
85281e76ee Jit: Remove unnecessary member variables 2023-08-26 17:05:04 +02:00
28e8117b90 Jit: Automatically clear cache when JIT settings are updated
This fixes a problem where changing the JIT debug settings on
Android while a game was running wouldn't cause the changed settings
to apply to code blocks that already had been compiled.
2023-08-26 17:04:56 +02:00
cd31da97d6 Merge pull request #11191 from JosJuice/jitarm64-no-checked-entry
JitArm64: Never check downcount on block entry
2023-08-26 17:00:08 +02:00
7197e3abd0 Use structs for config callback IDs
This way you can't mix up regular config callback IDs and CPU thread
config callback IDs. (It would be rather bad if you did!)
2023-08-17 19:19:26 +02:00
71ce8bb6f0 Don't call RunAsCPUThread in config callbacks
In theory, our config system supports calling Set from any thread. But
because we have config callbacks that call RunAsCPUThread, it's a lot
more restricted in practice. Calling Set from any thread other than the
host thread or the CPU thread is formally thread unsafe, and calling Set
on the host thread while the CPU thread is showing a panic alert causes
a deadlock. This is especially a problem because 04072f0 made the
"Ignore for this session" button in panic alerts call Set.

Because so many of our config callbacks want their code to run on the
CPU thread, I thought it would make sense to have a centralized way to
move execution to the CPU thread for config callbacks. To solve the
deadlock problem, this new way is non-blocking. This means that threads
other than the CPU thread might continue executing before the CPU thread
is informed of the new config, but I don't think there's any problem
with that.

Intends to fix https://bugs.dolphin-emu.org/issues/13108.
2023-08-17 19:19:25 +02:00
d2c5d79614 JitArm64: Use farcode in WriteLinkBlock
Now block link nearcode is back to a length of three instructions.

Unfortunately, the code I'm adding to Jit.cpp ends up being a bit messy
because we need to handle the case of already being in farcode...
2023-07-30 15:00:07 +02:00
1813f0fdb5 Jit: Remove checkedEntry
It's now always identical to normalEntry.
2023-07-30 14:28:02 +02:00
859da32a6c Jit: Improve block lookup performance through a shm memory segment.
By using a shm memory segment for the fast_block_map that is sparsely
allocated (i.e. on write by the OS) instead of a statically allocated
array we can make the block lookup faster by:
* Having a bigger space available for lookup that doesn't take up
  too much memory, because the OS will only allocate the needed
  pages when written to.
* Decrease the time spent to lookup a block in the assembly dispatcher
  due to less comparisions and shorter code (for example the pc check
  has been entirely dropped since only the msrBits need to be validated).

When the JIT block cache is full the shm segment will also be released
and reallocated to avoid allocating too much memory. It will also be
reset when the instruction cache is flushed by the PPC code to avoid
having stale entries.

Also fallback to the original method in case the memory segment couldn't
be allocated.
2023-05-20 16:26:55 +03:00
2561028b91 PPCTables: Remove unnecessary includes
Gets rid of a lingering dependency on the interpreter in common code and
a bunch of indirect inclusions.
2023-05-03 21:47:10 -04:00
4db186f9ff Common/JitRegister: Move interface into Common namespace
Makes the namespace consistent with other common utilities.
2023-05-02 12:00:05 -04:00
23843583bf PowerPC: Refactor to class, move to System. 2023-04-09 21:48:37 +02:00
e5941428d1 PowerPC/PPCTables: Pass instruction address to GetOpInfo(). 2023-04-05 20:09:32 +02:00
8dabd1a025 PowerPC/MMU: Refactor to class, move to System. 2023-03-28 03:47:51 +02:00
1885ddcde2 JitArm64: Avoid System::GetInstance() and ppcState. 2023-03-25 15:47:30 +01:00
9c0226b7e3 JitBase: Avoid System::GetInstance() and ppcState. 2023-03-25 02:37:00 +01:00
3b364c5c16 HW/CPU: Refactor to class, move to System. 2023-03-08 12:23:37 +01:00
b6256a57ef Jit: Move stack handling code to JitBase
Deduplication between Jit64 and JitArm64.
2023-02-28 20:30:06 +01:00
ba1b624e1b PowerPC: Remove MSR macro. 2023-01-27 15:22:42 +01:00
be8d0b76ca PowerPC: Remove PC macro. 2023-01-27 15:22:41 +01:00
eeeab3c3be Merge pull request #11183 from TheLordScruffy/write-back-cache
Implement PowerPC data cache
2023-01-09 17:09:32 +01:00
0659827485 Jit64: Check for breakpoint without disabling block link
Small optimization. By not calling WriteExit, the block linking system
never finds out about the exit we're doing, saving us from having to
disable block linking.
2022-12-24 13:01:29 +01:00
e97d380437 Implement PPC write-back data cache 2022-12-08 18:18:32 -05:00
09f9a58859 Jit64: Add dispatcher_no_timing_check jump target
The new `dispatcher_no_timing_check` is the same as `dispatcher_no_check`
except it includes the "stepping check" in debug mode. This lets us avoid
the `m_enable_debugging ? dispatcher : dispatcher_no_check` dance.
2022-10-16 11:22:34 +02:00
333ede5416 Merge pull request #11136 from AdmiralCurtiss/gqr-array
Jit64: Convert constantGqr to std::array.
2022-10-10 02:13:30 +02:00
e7219f7389 Jit64: Convert constantGqr to std::array. 2022-10-08 13:54:50 +02:00
6a2ed5758e JitCache: Erase address from noSpeculativeConstantsAddresses when block is invalidated. 2022-10-08 02:44:36 +02:00
78c6819f5e Core: pause on panic handler option 2022-09-02 13:22:32 -07:00
69e32dea52 Resolve GCC Warnings 2022-06-30 15:26:48 -05:00
be81fe86e1 JitRegister: Use fmt
Prefer fmt to printf-style formatting.
2022-02-16 20:09:38 +00:00
92d2fd9d5f Config: Port MMU setting to new config system. 2022-01-09 21:29:12 +01:00
dc7e7d08ad Config: Port Fastmem setting to new config system. 2022-01-06 16:13:56 +01:00
68688e7903 Config: Port PerfMapDir setting to new config system. 2022-01-06 16:13:55 +01:00
e08171fa24 Config: Port remaining Core settings to new config system (partial). 2022-01-05 00:54:15 +01:00
d6331c1e71 Config: Port remaining Interface settings to new config system. 2021-12-31 17:40:04 +01:00
810dcfa0f6 Config: Port Debug settings to new config system. 2021-12-30 22:28:05 +01:00
2025763420 Treewide: Adjust order of includes 2021-12-10 14:49:57 -08:00
824e0c00df JitCache: Remove irrelevant comment
It became irrelevant in 952dfcd610, when the define was removed; now, the code the comment is referring to is in JitRegister.cpp, and oprofile is controlled by cmake.
2021-12-10 13:59:38 -08:00
78bfd25964 Fix all uninitialized variable warnings (C26495) 2021-10-13 12:32:16 -07:00
9f525d69c8 Jit: Raise program exception on floating point exceptions
This is done entirely through interpreter fallbacks. It would
probably be possible to implement this using host exception
handlers instead, but I think it would be a lot of complexity
for a rarely used feature, so let's not do it for now.

For performance reasons, there are two settings for this feature:
One setting which does enables just what True Crime: New York City
needs and one setting which enables it all. The latter makes
almost all float instructions fall back to the interpreter.
2021-10-13 17:42:56 +02:00
34992f52c7 PowerPC/JitCache: Clear valid_block bits for long invalidations. 2021-09-07 23:14:20 +02:00
df1e59409b PowerPC: Handle translation if range given to InvalidateICache spans multiple BAT or Page Table pages. 2021-08-13 21:23:12 +02:00
4afbd87188 PowerPC: Fast path in InvalidateICache is only valid if the address is 32-byte aligned. 2021-08-12 19:27:25 +02:00
95fbd09691 PowerPC: Update variable name conventions and const-ness around calls to JitCache_TranslateAddress(). 2021-08-09 01:25:04 +02:00
ca55d599e8 Jit: Mark ValidBlockBitSet::Test as const 2021-07-27 11:11:30 +02:00
b84a0704cd Revert "Jit: Fix correctness issue in dcbf/dcbi/dcbst"
This reverts commit 66b992cfe4.

A new (additional) correctness issue was revealed in the old
AArch64 code when applying it on top of modern JitArm64:
LSR was being used when LSRV was intended. This commit uses LSRV.
2021-07-25 15:13:57 +02:00
e149ad4f0a treewide: convert GPLv2+ license info to SPDX tags
SPDX standardizes how source code conveys its copyright and licensing
information. See https://spdx.github.io/spdx-spec/1-rationale/ . SPDX
tags are adopted in many large projects, including things like the Linux
kernel.
2021-07-05 04:35:56 +02:00
bfe8b1068d JitArm64: Implement FPRF updates 2021-05-13 11:51:00 +02:00
51bf2dca21 Merge pull request #9675 from JosJuice/jit64-div-80000000
Jit64: Fix UB/infinite loop when compiling division by 0x80000000
2021-04-26 23:50:27 +02:00
7d4b87e7ae Jit64: Fix UB/infinite loop when compiling division by 0x80000000 2021-04-26 23:42:03 +02:00