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101 Commits

Author SHA1 Message Date
Lioncash
13506d3c12 x64Emitter: Generify ABI_CallFunction variants 
Gets rid of the need to cast to void* just to use the functions.
 2016-08-31 22:54:47 -04:00
hthh
e57333ac5e Jit: Remove unsafe MOV optimization 
This optimization broke arithXex in rare cases by
emitting XOR where MOV was expected.
 2016-07-01 01:43:35 +10:00
Matt Mastracci
1e08ad0d97 Add MOV optimization and MOV_sum 
Replaces incarnations of the A=B+C pattern throughout the
code so we can apply optimizations consistently.
 2016-06-27 15:43:52 -06:00
Matt Mastracci
b1296a7825 Refactor fastmem/trampoline code. 
Simplication to avoid reading back the generated instructions, allowing
us to handle all possible cases.
 2016-06-27 14:58:20 -06:00
Pierre Bourdon
3570c7f03a Reformat all the things. Have fun with merge conflicts. 2016-06-24 10:43:46 +02:00
Lioncash
cfa43f64bf x64Emitter: Remove pointer cast 
No more ubsan asserts in the JIT and x64 emitter code paths when running starfield.
 2015-09-17 09:35:13 -04:00
Lioncash
19459e827f Partially revert "General: Toss out PRI macro usage" 2015-09-11 09:49:00 -04:00
Lioncash
8fdb013d54 General: Toss out PRI macro usage 
Now that VS supports more printf specifiers, these aren't necessary
 2015-09-05 16:02:35 -04:00
Tillmann Karras
ee4a12ffe2 Jit64: some byte-swapping changes 2015-08-26 05:41:18 +02:00
aroulin
0a0e012fab x64Emitter: add RCPPS and RCPSS SSE instructions 2015-08-23 16:59:27 +02:00
Lioncash
a69755d9ee x64Emitter: Remove pointer casts from Write{8,16,32,64} functions 
This also silences quite a few ubsan asserts from firing when the emitter is being used.
 2015-08-21 18:09:48 -04:00
Lioncash
a59f00a5e4 x64Emitter: Remove unused code 2015-08-20 23:05:20 -04:00
Tillmann Karras
022286fb90 x64Emitter: don't check flags for most BMI2 ops 
With the exception of BZHI, BMI2 instructions don't affect flags, so
don't check if they're locked.
 2015-08-14 23:39:17 +02:00
Tillmann Karras
5e9fe4cd13 x64Emitter: check for immediates in BMI ops 2015-08-14 21:25:41 +02:00
Tillmann Karras
439fb26b9b x64Emitter: add MOVSLDUP/MOVSHDUP 2015-08-06 10:39:43 +02:00
Tillmann Karras
5ddd2cef6c zfreeze: cache vertex positions 
Suggested by degasus.
 2015-06-07 12:13:00 +02:00
Tillmann Karras
8db6588bb9 XEmitter: add FMA4 instructions 2015-06-02 19:19:52 +02:00
Lioncash
e3a6191f02 x64Emitter: Pass some OpArg parameters by const reference 
Considering OpArg is a struct, passing by value creates unnecessary copies.
 2015-05-29 01:13:29 -04:00
Lioncash
810a04db58 x64Emitter: Remove 'Gen::' namespace prefix from some parameters 
The emitter is already within the Gen namespace, so this isn't necessary.
 2015-05-29 01:05:09 -04:00
Lioncash
84ed196c14 x64Emitter: Adjust position of reference and pointer indicators 
Matches the coding style.
 2015-05-29 01:04:45 -04:00
Ryan Houdek
7c04c76a26 Merge pull request #2421 from Tilka/jit_stuff 
Jit64: fixes + less code
 2015-05-25 23:08:24 -04:00
Tillmann Karras
30ebb2459e Set copyright year to when a file was created 2015-05-25 13:22:31 +02:00
Tillmann Karras
cefcb0ace9 Update license headers to GPLv2+ 2015-05-25 13:22:31 +02:00
Tillmann Karras
6593ba7ecc XEmitter: add BLENDPS/BLENDPD 2015-05-21 12:33:36 +02:00
Tillmann Karras
ad6b522c3b XEmitter: fix L bit in VEX prefix 2015-05-20 09:34:27 +02:00
Tillmann Karras
c2c31086ae XEmitter: restructure WriteVEXOp wrappers 2015-05-17 18:44:56 +02:00
Tillmann Karras
ae8efaa6a3 XEmitter: add VBLENDVPD and VCMPPD 2015-05-17 18:42:36 +02:00
Tillmann Karras
18e9241637 XEmitter: rename WriteVex to WriteVEX 2015-05-17 09:35:53 +02:00
Tillmann Karras
9e3f4df733 XEmitter: rename WriteRex to WriteREX 2015-05-17 09:35:53 +02:00
comex
b3aaa46d42 Merge pull request #2088 from Sintendo/diecmp 
Emit 'TEST reg, reg' for 'CMP reg, 0' automatically
 2015-04-23 16:34:23 -04:00
comex
ad95454d04 Merge pull request #2223 from phire/imm 
Cleanup OpArg, make immediates more explicit.
 2015-04-23 01:53:18 -04:00
Sintendo
c19482c9a3 Add function to emit CMP, or TEST when possible 
Also, a spelling mistake.
 2015-03-22 17:22:27 +01:00
magumagu
52aeab3d0e Merge pull request #2240 from lioncash/emitter 
x64Emitter: Remove emitter pointer parameter from WriteNormalOp.
 2015-03-20 22:09:11 -07:00
Lioncash
fab7add718 x64Emitter: Remove emitter pointer parameter from WriteNormalOp. 
It only ever passed the equivalent of the class' this pointer. May as well get rid of it.
 2015-03-20 23:28:36 -04:00
Tillmann Karras
9793fed742 XEmitter: add PUNPCKLQDQ 2015-03-18 12:09:06 +01:00
Scott Mansell
858ff69c01 Make OpArg.offset and operandReg private. 
Also cleaned up WriteRest function.
 2015-03-17 18:49:30 +13:00
Ryan Houdek
80e6367e46 Merge pull request #1869 from Stevoisiak/GeneralConsistency 
Minor consistency changes
 2015-01-21 13:46:53 -06:00
Tillmann Karras
e80b657cf4 Move MOVBE wrappers directly into XEmitter class 2015-01-18 13:29:34 +01:00
Tillmann Karras
eb13aa43fe XEmitter: overload MOVBE() 2015-01-18 12:59:33 +01:00
Stevoisiak
cb86db7b68 Minor consistency changes 
Mostly small changes, like capitalization and spelling
 2015-01-12 15:18:18 -05:00
Tillmann Karras
1efa9b8b72 x64Emitter: add MOVLPS/MOVHPS 2015-01-07 11:23:52 +01:00
Tillmann Karras
3daa6ab259 x64Emitter: fix MOVLPD/MOVHPD 
These instructions were using the wrong prefix which turned
MOVLPD(reg, mem) into MOVDDUP(reg, mem) and made the rest of them
invalid.
 2015-01-07 11:23:52 +01:00
Tillmann Karras
986d19b9d5 x64Emitter: fix bitwise AVX opcodes 
The reason this didn't break is that bitwise instructions like VPAND,
VANDPS, and VANDPD do the exact same thing. The only difference is the
data type they are intended for.
 2014-12-06 22:28:03 +01:00
Stevoisiak
b25e1a2eb4 Various formatting and consistency fixes 2014-11-13 22:42:18 -05:00
Fiora
6603f98d04 JIT: add 64-bit write support to FIFO functions 
Also fix 64-bit values passed to CallAC and otherwise correct immediate
handling in FIFO writes.
Fixes 007 Nightfire.
 2014-11-09 21:24:30 -08:00
skidau
9ddbdeb39f Merge pull request #995 from FioraAeterna/fma 
Add FMA support to emitter and use it in the JIT
 2014-10-12 13:56:18 +11:00
Henrik Rydgård
877081c7df Be consistent with braces. 2014-10-10 22:34:03 +02:00
Henrik Rydgård
9bca1a00d7 x64 emitter: Add some more missing ops (MOVDQA, MOVDQU, PSHUFHW) 
Also constify some pointers.
 2014-10-10 18:30:05 +02:00
Henrik Rydgård
a2c46665c5 x64 emitter: Add a few missing instructions 2014-10-10 18:30:04 +02:00
Fiora
019657cd93 X64Emitter: add FMA3 support 2014-10-07 18:21:07 -07:00