Merge 137cf485b2 into 80ea68b13c

Merge pull request #13183 from Tilka/sync_on_fifo_reset
ProcessorInterface: sync GPU just before PI_FIFO_RESET
2024-11-14 13:27:45 -07:00 · 2024-11-11 22:12:41 +08:00 · 2024-11-11 00:38:26 -05:00 · 2024-11-09 03:29:05 +00:00 · 2024-05-13 14:06:27 -04:00
3 changed files with 4 additions and 7 deletions
--- a/Source/Core/Core/CoreTiming.cpp
+++ b/Source/Core/Core/CoreTiming.cpp
@ -360,11 +360,6 @@ void CoreTimingManager::Throttle(const s64 target_cycle)
 {
  // Based on number of cycles and emulation speed, increase the target deadline
  const s64 cycles = target_cycle - m_throttle_last_cycle;
-
-  // Prevent any throttling code if the amount of time passed is < ~0.122ms
-  if (cycles < m_throttle_min_clock_per_sleep)
-    return;
-
  m_throttle_last_cycle = target_cycle;

  const double speed = Core::GetIsThrottlerTempDisabled() ? 0.0 : m_emulation_speed;
@ -442,7 +437,6 @@ void CoreTimingManager::LogPendingEvents() const
 void CoreTimingManager::AdjustEventQueueTimes(u32 new_ppc_clock, u32 old_ppc_clock)
 {
  m_throttle_clock_per_sec = new_ppc_clock;
-  m_throttle_min_clock_per_sleep = new_ppc_clock / 1200;

  for (Event& ev : m_event_queue)
  {
--- a/Source/Core/Core/CoreTiming.h
+++ b/Source/Core/Core/CoreTiming.h
@ -203,7 +203,6 @@ private:
  s64 m_throttle_last_cycle = 0;
  TimePoint m_throttle_deadline = Clock::now();
  s64 m_throttle_clock_per_sec = 0;
-  s64 m_throttle_min_clock_per_sleep = 0;
  bool m_throttle_disable_vi_int = false;

  DT m_max_fallback = {};
--- a/Source/Core/Core/HW/ProcessorInterface.cpp
+++ b/Source/Core/Core/HW/ProcessorInterface.cpp
@ -98,6 +98,10 @@ void ProcessorInterfaceManager::RegisterMMIO(MMIO::Mapping* mmio, u32 base)
                   {
                     system.GetGPFifo().ResetGatherPipe();

+                     // Assume that all bytes that made it into the GPU fifo did in fact execute
+                     // before this MMIO write takes effect.
+                     system.GetFifo().SyncGPUForRegisterAccess();
+
                     // Call Fifo::ResetVideoBuffer() from the video thread. Since that function
                     // resets various pointers used by the video thread, we can't call it directly
                     // from the CPU thread, so queue a task to do it instead. In single-core mode,
Author	SHA1	Message	Date
Sam Belliveau	2559a93f4d	Merge `137cf485b2` into `80ea68b13c`	2024-11-11 22:12:41 +08:00
JMC47	80ea68b13c	Merge pull request #13183 from Tilka/sync_on_fifo_reset ProcessorInterface: sync GPU just before PI_FIFO_RESET	2024-11-11 00:38:26 -05:00
Tillmann Karras	fbce737415	ProcessorInterface: sync GPU just before PI_FIFO_RESET GXAbortFrame() is problematic for Dolphin because it first writes PI_FIFO_RESET (for which we discard our internal fifo), then disables CP reads (for which we execute pending commands in the GP fifo in emulated memory). I don't know whether there is a race condition on hardware, but there is one for us. Avoid this by also doing a GPU sync here.	2024-11-09 03:29:05 +00:00
Sam Belliveau	137cf485b2	Remove min_clock_per_sleep to improve VPS consistency	2024-05-13 14:06:27 -04:00