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4 Commits
b1ac5d5377
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d4e43818f7
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d4e43818f7 | ||
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fe96bf4108 | ||
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c1ff466e16 |
@ -1,22 +0,0 @@
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{
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"name": "SDL2",
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"buildsystem": "autotools",
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"config-opts": ["--disable-static"],
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"sources": [
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{
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"type": "dir",
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"path": "../../Externals/SDL/SDL"
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}
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],
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"cleanup": [ "/bin/sdl2-config",
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"/include",
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"/lib/libSDL2.la",
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"/lib/libSDL2main.a",
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"/lib/libSDL2main.la",
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"/lib/libSDL2_test.a",
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"/lib/libSDL2_test.la",
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"/lib/cmake",
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"/share/aclocal",
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"/lib/pkgconfig"]
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}
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@ -1,6 +1,6 @@
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app-id: org.DolphinEmu.dolphin-emu
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runtime: org.kde.Platform
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runtime-version: '6.7'
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runtime-version: '6.8'
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sdk: org.kde.Sdk
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command: dolphin-emu-wrapper
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rename-desktop-file: dolphin-emu.desktop
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@ -47,9 +47,6 @@ modules:
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url: https://github.com/Unrud/xdg-screensaver-shim/archive/0.0.2.tar.gz
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sha256: 0ed2a69fe6ee6cbffd2fe16f85116db737f17fb1e79bfb812d893cf15c728399
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# build the vendored SDL2 from Externals until the runtime gets 2.30.6
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- SDL2/SDL2.json
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- name: dolphin-emu
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buildsystem: cmake-ninja
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config-opts:
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@ -938,16 +938,14 @@ bool MMU::IsOptimizableRAMAddress(const u32 address, const u32 access_size) cons
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}
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template <XCheckTLBFlag flag>
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bool MMU::IsRAMAddress(u32 address, bool translate)
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bool MMU::IsEffectiveRAMAddress(u32 address)
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{
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if (translate)
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{
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auto translate_address = TranslateAddress<flag>(address);
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if (!translate_address.Success())
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return false;
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address = translate_address.address;
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}
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return translate_address.Success() && IsPhysicalRAMAddress(translate_address.address);
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}
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bool MMU::IsPhysicalRAMAddress(const u32 address) const
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{
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u32 segment = address >> 28;
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if (m_memory.GetRAM() && segment == 0x0 && (address & 0x0FFFFFFF) < m_memory.GetRamSizeReal())
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{
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@ -977,13 +975,14 @@ bool MMU::HostIsRAMAddress(const Core::CPUThreadGuard& guard, u32 address,
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switch (space)
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{
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case RequestedAddressSpace::Effective:
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return mmu.IsRAMAddress<XCheckTLBFlag::NoException>(address, mmu.m_ppc_state.msr.DR);
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return mmu.m_ppc_state.msr.DR ? mmu.IsEffectiveRAMAddress<XCheckTLBFlag::NoException>(address) :
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mmu.IsPhysicalRAMAddress(address);
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case RequestedAddressSpace::Physical:
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return mmu.IsRAMAddress<XCheckTLBFlag::NoException>(address, false);
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return mmu.IsPhysicalRAMAddress(address);
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case RequestedAddressSpace::Virtual:
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if (!mmu.m_ppc_state.msr.DR)
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return false;
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return mmu.IsRAMAddress<XCheckTLBFlag::NoException>(address, true);
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return mmu.IsEffectiveRAMAddress<XCheckTLBFlag::NoException>(address);
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}
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ASSERT(false);
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@ -1001,13 +1000,15 @@ bool MMU::HostIsInstructionRAMAddress(const Core::CPUThreadGuard& guard, u32 add
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switch (space)
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{
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case RequestedAddressSpace::Effective:
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return mmu.IsRAMAddress<XCheckTLBFlag::OpcodeNoException>(address, mmu.m_ppc_state.msr.IR);
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return mmu.m_ppc_state.msr.IR ?
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mmu.IsEffectiveRAMAddress<XCheckTLBFlag::OpcodeNoException>(address) :
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mmu.IsPhysicalRAMAddress(address);
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case RequestedAddressSpace::Physical:
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return mmu.IsRAMAddress<XCheckTLBFlag::OpcodeNoException>(address, false);
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return mmu.IsPhysicalRAMAddress(address);
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case RequestedAddressSpace::Virtual:
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if (!mmu.m_ppc_state.msr.IR)
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return false;
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return mmu.IsRAMAddress<XCheckTLBFlag::OpcodeNoException>(address, true);
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return mmu.IsEffectiveRAMAddress<XCheckTLBFlag::OpcodeNoException>(address);
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}
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ASSERT(false);
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@ -310,7 +310,8 @@ private:
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template <XCheckTLBFlag flag, bool never_translate = false>
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void WriteToHardware(u32 em_address, const u32 data, const u32 size);
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template <XCheckTLBFlag flag>
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bool IsRAMAddress(u32 address, bool translate);
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bool IsEffectiveRAMAddress(u32 address);
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bool IsPhysicalRAMAddress(u32 address) const;
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template <typename T>
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static std::optional<ReadResult<T>> HostTryReadUX(const Core::CPUThreadGuard& guard,
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