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Author SHA1 Message Date
OatmealDome
1b81075bb4
Merge 4480309802 into 80ea68b13c 2024-11-11 22:13:24 +08:00
JMC47
80ea68b13c
Merge pull request #13183 from Tilka/sync_on_fifo_reset
ProcessorInterface: sync GPU just before PI_FIFO_RESET
2024-11-11 00:38:26 -05:00
Tillmann Karras
fbce737415 ProcessorInterface: sync GPU just before PI_FIFO_RESET
GXAbortFrame() is problematic for Dolphin because it first writes
PI_FIFO_RESET (for which we discard our internal fifo), then disables CP
reads (for which we execute pending commands in the GP fifo in emulated
memory). I don't know whether there is a race condition on hardware, but
there is one for us. Avoid this by also doing a GPU sync here.
2024-11-09 03:29:05 +00:00
OatmealDome
4480309802 Dummy commit 5 2024-11-04 12:57:58 -05:00
OatmealDome
c0c3380e16 Dummy commit 4 2024-11-04 12:57:58 -05:00
OatmealDome
b20a4af7f9 Dummy commit 3 2024-11-04 12:57:58 -05:00
OatmealDome
6be1ea8807 Dummy commit 2 2024-11-04 12:57:58 -05:00
OatmealDome
99ef036919 Dummy commit 2024-11-04 12:57:58 -05:00
2 changed files with 5 additions and 0 deletions

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@ -98,6 +98,10 @@ void ProcessorInterfaceManager::RegisterMMIO(MMIO::Mapping* mmio, u32 base)
{
system.GetGPFifo().ResetGatherPipe();
// Assume that all bytes that made it into the GPU fifo did in fact execute
// before this MMIO write takes effect.
system.GetFifo().SyncGPUForRegisterAccess();
// Call Fifo::ResetVideoBuffer() from the video thread. Since that function
// resets various pointers used by the video thread, we can't call it directly
// from the CPU thread, so queue a task to do it instead. In single-core mode,

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