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188 lines
5.4 KiB
C++
188 lines
5.4 KiB
C++
#include <disasm.h> // Bochs
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#if defined(HAVE_LLVM)
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// PowerPC.h defines PC.
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// This conflicts with a function that has an argument named PC
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#undef PC
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#include <llvm-c/Disassembler.h>
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#include <llvm-c/Target.h>
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#endif
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#include "Common/StringUtil.h"
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#include "Core/PowerPC/JitCommon/JitBase.h"
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#include "Core/PowerPC/JitCommon/JitCache.h"
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#include "Core/PowerPC/JitInterface.h"
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#include "UICommon/Disassembler.h"
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class HostDisassemblerX86 : public HostDisassembler
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{
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public:
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HostDisassemblerX86();
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private:
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disassembler m_disasm;
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std::string DisassembleHostBlock(const u8* code_start, const u32 code_size,
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u32* host_instructions_count, u64 starting_pc) override;
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};
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#if defined(HAVE_LLVM)
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class HostDisassemblerLLVM : public HostDisassembler
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{
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public:
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HostDisassemblerLLVM(const std::string& host_disasm, int inst_size = -1,
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const std::string& cpu = "");
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~HostDisassemblerLLVM()
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{
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if (m_can_disasm)
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LLVMDisasmDispose(m_llvm_context);
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}
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private:
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bool m_can_disasm;
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LLVMDisasmContextRef m_llvm_context;
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int m_instruction_size;
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std::string DisassembleHostBlock(const u8* code_start, const u32 code_size,
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u32* host_instructions_count, u64 starting_pc) override;
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};
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HostDisassemblerLLVM::HostDisassemblerLLVM(const std::string& host_disasm, int inst_size,
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const std::string& cpu)
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: m_can_disasm(false), m_instruction_size(inst_size)
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{
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LLVMInitializeAllTargetInfos();
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LLVMInitializeAllTargetMCs();
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LLVMInitializeAllDisassemblers();
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m_llvm_context = LLVMCreateDisasmCPU(host_disasm.c_str(), cpu.c_str(), nullptr, 0, 0, nullptr);
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// Couldn't create llvm context
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if (!m_llvm_context)
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return;
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LLVMSetDisasmOptions(m_llvm_context, LLVMDisassembler_Option_AsmPrinterVariant |
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LLVMDisassembler_Option_PrintLatency);
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m_can_disasm = true;
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}
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std::string HostDisassemblerLLVM::DisassembleHostBlock(const u8* code_start, const u32 code_size,
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u32* host_instructions_count,
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u64 starting_pc)
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{
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if (!m_can_disasm)
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return "(No LLVM context)";
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u8* disasmPtr = (u8*)code_start;
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const u8* end = code_start + code_size;
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std::ostringstream x86_disasm;
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while ((u8*)disasmPtr < end)
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{
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char inst_disasm[256];
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size_t inst_size = LLVMDisasmInstruction(m_llvm_context, disasmPtr, (u64)(end - disasmPtr),
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starting_pc, inst_disasm, 256);
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x86_disasm << "0x" << std::hex << starting_pc << "\t";
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if (!inst_size)
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{
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x86_disasm << "Invalid inst:";
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if (m_instruction_size != -1)
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{
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// If we are on an architecture that has a fixed instruction size
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// We can continue onward past this bad instruction.
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std::string inst_str = "";
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for (int i = 0; i < m_instruction_size; ++i)
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inst_str += StringFromFormat("%02x", disasmPtr[i]);
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x86_disasm << inst_str << std::endl;
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disasmPtr += m_instruction_size;
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}
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else
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{
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// We can't continue if we are on an architecture that has flexible instruction sizes
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// Dump the rest of the block instead
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std::string code_block = "";
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for (int i = 0; (disasmPtr + i) < end; ++i)
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code_block += StringFromFormat("%02x", disasmPtr[i]);
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x86_disasm << code_block << std::endl;
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break;
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}
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}
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else
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{
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x86_disasm << inst_disasm << std::endl;
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disasmPtr += inst_size;
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starting_pc += inst_size;
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}
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(*host_instructions_count)++;
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}
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return x86_disasm.str();
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}
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#endif
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HostDisassemblerX86::HostDisassemblerX86()
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{
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m_disasm.set_syntax_intel();
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}
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std::string HostDisassemblerX86::DisassembleHostBlock(const u8* code_start, const u32 code_size,
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u32* host_instructions_count, u64 starting_pc)
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{
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u64 disasmPtr = (u64)code_start;
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const u8* end = code_start + code_size;
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std::ostringstream x86_disasm;
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while ((u8*)disasmPtr < end)
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{
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char inst_disasm[256];
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disasmPtr += m_disasm.disasm64(disasmPtr, disasmPtr, (u8*)disasmPtr, inst_disasm);
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x86_disasm << inst_disasm << std::endl;
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(*host_instructions_count)++;
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}
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return x86_disasm.str();
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}
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std::unique_ptr<HostDisassembler> GetNewDisassembler(const std::string& arch)
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{
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#if defined(HAVE_LLVM)
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if (arch == "x86")
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return std::make_unique<HostDisassemblerLLVM>("x86_64-none-unknown");
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if (arch == "aarch64")
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return std::make_unique<HostDisassemblerLLVM>("aarch64-none-unknown", 4, "cortex-a57");
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if (arch == "armv7")
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return std::make_unique<HostDisassemblerLLVM>("armv7-none-unknown", 4, "cortex-a15");
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#elif defined(_M_X86)
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if (arch == "x86")
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return std::make_unique<HostDisassemblerX86>();
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#endif
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return std::make_unique<HostDisassembler>();
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}
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std::string DisassembleBlock(HostDisassembler* disasm, u32* address, u32* host_instructions_count,
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u32* code_size)
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{
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const u8* code;
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int res = JitInterface::GetHostCode(address, &code, code_size);
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if (res == 1)
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{
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*host_instructions_count = 0;
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return "(No JIT active)";
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}
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else if (res == 2)
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{
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*host_instructions_count = 0;
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return "(No translation)";
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}
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return disasm->DisassembleHostBlock(code, *code_size, host_instructions_count, (u64)code);
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}
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