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The PowerPC CPU has bits in MSR (DR and IR) which control whether addresses are translated. We should respect these instead of mixing physical addresses and translated addresses into the same address space. This is mostly mass-renaming calls to memory accesses APIs from places which expect address translation to use a different version from those which do not expect address translation. This does very little on its own, but it's the first step to a correct BAT implementation.
96 lines
2.8 KiB
C++
96 lines
2.8 KiB
C++
// Copyright 2014 Dolphin Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#pragma once
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#include <string>
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#include "Common/CommonFuncs.h"
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#include "Common/CommonTypes.h"
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// Enable memory checks in the Debug/DebugFast builds, but NOT in release
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#if defined(_DEBUG) || defined(DEBUGFAST)
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#define ENABLE_MEM_CHECK
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#endif
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// Global declarations
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class PointerWrap;
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namespace MMIO { class Mapping; }
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namespace Memory
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{
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// Base is a pointer to the base of the memory map. Yes, some MMU tricks
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// are used to set up a full GC or Wii memory map in process memory. on
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// 32-bit, you have to mask your offsets with 0x3FFFFFFF. This means that
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// some things are mirrored too many times, but eh... it works.
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// In 64-bit, this might point to "high memory" (above the 32-bit limit),
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// so be sure to load it into a 64-bit register.
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extern u8* physical_base;
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extern u8* logical_base;
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// These are guaranteed to point to "low memory" addresses (sub-32-bit).
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extern u8* m_pRAM;
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extern u8* m_pEXRAM;
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extern u8* m_pL1Cache;
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extern u8* m_pFakeVMEM;
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extern bool bFakeVMEM;
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enum
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{
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// RAM_SIZE is the amount allocated by the emulator, whereas REALRAM_SIZE is
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// what will be reported in lowmem, and thus used by emulated software.
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// Note: Writing to lowmem is done by IPL. If using retail IPL, it will
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// always be set to 24MB.
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REALRAM_SIZE = 0x01800000,
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RAM_SIZE = ROUND_UP_POW2(REALRAM_SIZE),
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RAM_MASK = RAM_SIZE - 1,
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FAKEVMEM_SIZE = 0x02000000,
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FAKEVMEM_MASK = FAKEVMEM_SIZE - 1,
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L1_CACHE_SIZE = 0x00040000,
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L1_CACHE_MASK = L1_CACHE_SIZE - 1,
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IO_SIZE = 0x00010000,
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EXRAM_SIZE = 0x04000000,
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EXRAM_MASK = EXRAM_SIZE - 1,
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ADDR_MASK_HW_ACCESS = 0x0c000000,
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ADDR_MASK_MEM1 = 0x20000000,
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#if _ARCH_32
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MEMVIEW32_MASK = 0x3FFFFFFF,
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#endif
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};
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// MMIO mapping object.
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extern MMIO::Mapping* mmio_mapping;
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// Init and Shutdown
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bool IsInitialized();
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void Init();
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void Shutdown();
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void DoState(PointerWrap &p);
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void Clear();
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bool AreMemoryBreakpointsActivated();
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// Routines to access physically addressed memory, designed for use by
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// emulated hardware outside the CPU. Use "Device_" prefix.
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std::string GetString(u32 em_address, size_t size = 0);
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u8* GetPointer(const u32 address);
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void CopyFromEmu(void* data, u32 address, size_t size);
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void CopyToEmu(u32 address, const void* data, size_t size);
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void Memset(const u32 address, const u8 var, const u32 length);
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u8 Read_U8(const u32 address);
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u16 Read_U16(const u32 address);
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u32 Read_U32(const u32 address);
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u64 Read_U64(const u32 address);
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void Write_U8(const u8 var, const u32 address);
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void Write_U16(const u16 var, const u32 address);
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void Write_U32(const u32 var, const u32 address);
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void Write_U64(const u64 var, const u32 address);
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void Write_U32_Swap(const u32 var, const u32 address);
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void Write_U64_Swap(const u64 var, const u32 address);
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}
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