mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2024-11-14 21:37:52 -07:00
7a03b1fe16
Most of these correspond to changes made in devkitPro/libogc@b1b8ecab3a.
The numeric vlaues of ACC0 and ACC1 in Dolphin are different (see b06d38389b, though I'm not sure when this difference first appeared). Technically it's not even necessary to list the registers at the start like this anymore, but old programs do it, so it seems useful to have a test that covers it.
The binary itself does not need to be changed; the warnings were simply stating that "although you wrote $ACL0, the generated binary instead is using $ACC0" or similar; by changing the code to use $ACC0 directly the warnings are resolved.
1087 lines
22 KiB
C++
1087 lines
22 KiB
C++
/* DSP_MIXER -> PCM VOICE SOFTWARE PROCESSOR (8-16 Bits Mono/Stereo Voices)
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// Thanks to Duddie for you hard work and documentation
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Copyright (c) 2008 Hermes <www.entuwii.net>
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All rights reserved.
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SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "HermesText.h"
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const char s_hermes_text[21370] = R"(
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/********************************/
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/** REGISTER NAMES **/
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/********************************/
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AR0: equ 0x00 ; address registers
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AR1: equ 0x01
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AR2: equ 0x02
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AR3: equ 0x03 // used as jump function selector
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IX0: equ 0x04 // LEFT_VOLUME accel
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IX1: equ 0x05 // RIGHT_VOLUME accel
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IX2: equ 0x06 // ADDRH_SMP accel
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IX3: equ 0x07 // ADDRL_SMP accel
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R08: equ 0x08 // fixed to 48000 value
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R09: equ 0x09 // problems using this
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R0A: equ 0x0a // ADDREH_SMP accel
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R0B: equ 0x0b // ADDREL_SMP accel
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ST0: equ 0x0c
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ST1: equ 0x0d
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ST2: equ 0x0e
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ST3: equ 0x0f
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CONFIG: equ 0x12
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SR: equ 0x13
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PRODL: equ 0x14
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PRODM: equ 0x15
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PRODH: equ 0x16
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PRODM2: equ 0x17
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AXL0: equ 0x18
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AXL1: equ 0x19
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AXH0: equ 0x1A // SMP_R accel
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AXH1: equ 0x1b // SMP_L accel
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ACC0: equ 0x20 // accumulator (global)
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ACC1: equ 0x21
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ACL0: equ 0x1c // Low accumulator
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ACL1: equ 0x1d
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ACM0: equ 0x1e // Mid accumulator
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ACM1: equ 0x1f
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ACH0: equ 0x10 // Sign extended 8 bit register 0
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ACH1: equ 0x11 // Sign extended 8 bit register 1
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/********************************/
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/** HARDWARE REGISTER ADDRESS **/
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/********************************/
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DSCR: equ 0xffc9 ; DSP DMA Control Reg
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DSBL: equ 0xffcb ; DSP DMA Block Length
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DSPA: equ 0xffcd ; DSP DMA DMEM Address
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DSMAH: equ 0xffce ; DSP DMA Mem Address H
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DSMAL: equ 0xffcf ; DSP DMA Mem Address L
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DIRQ: equ 0xfffb ; DSP Irq Request
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DMBH: equ 0xfffc ; DSP Mailbox H
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DMBL: equ 0xfffd ; DSP Mailbox L
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CMBH: equ 0xfffe ; CPU Mailbox H
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CMBL: equ 0xffff ; CPU Mailbox L
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DMA_TO_DSP: equ 0
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DMA_TO_CPU: equ 1
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/**************************************************************/
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/* NUM_SAMPLES SLICE */
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/**************************************************************/
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NUM_SAMPLES: equ 1024 ; 1024 stereo samples 16 bits
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/**************************************************************/
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/* SOUND CHANNEL REGS */
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/**************************************************************/
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MEM_REG2: equ 0x0
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MEM_VECTH: equ MEM_REG2
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MEM_VECTL: equ MEM_REG2+1
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RETURN: equ MEM_REG2+2
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/**************************************************************/
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/* CHANNEL DATAS */
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/**************************************************************/
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MEM_REG: equ MEM_REG2+0x10
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ADDRH_SND: equ MEM_REG // Output buffer
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ADDRL_SND: equ MEM_REG+1
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DELAYH_SND: equ MEM_REG+2 // Delay samples High word
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DELAYL_SND: equ MEM_REG+3 // Delay samples Low word
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CHAN_REGS: equ MEM_REG+4 // specific regs for the channel
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FLAGSH_SMP: equ CHAN_REGS+0 // countain number of bytes for step (1-> Mono 8 bits, 2-> Stereo 8 bits and Mono 16 bits, 4-> Stereo 16 bits)
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FLAGSL_SMP: equ CHAN_REGS+1 // 0->Mono 8 bits, 1->Stereo 8 bits, 2->Mono 16 bits 3 -> Stereo 16 bits
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ADDRH_SMP: equ CHAN_REGS+2 // start address
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ADDRL_SMP: equ CHAN_REGS+3
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ADDREH_SMP: equ CHAN_REGS+4 // end address
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ADDREL_SMP: equ CHAN_REGS+5
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FREQH_SMP: equ CHAN_REGS+6 // Freq in Hz to play
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FREQL_SMP: equ CHAN_REGS+7
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SMP_L: equ CHAN_REGS+8 // last sample for left (used to joint various buffers)
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SMP_R: equ CHAN_REGS+9 // last sample for right (used to joint various buffers)
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COUNTERH_SMP: equ CHAN_REGS+10 // pitch counter
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COUNTERL_SMP: equ CHAN_REGS+11
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LEFT_VOLUME: equ CHAN_REGS+12 // volume (0 to 255)
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RIGHT_VOLUME: equ CHAN_REGS+13
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ADDR2H_SMP: equ CHAN_REGS+14 // start address of buffer two (to joint)
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ADDR2L_SMP: equ CHAN_REGS+15
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ADDR2EH_SMP: equ CHAN_REGS+16 // end address of buffer two (to joint)
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ADDR2EL_SMP: equ CHAN_REGS+17
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LEFT_VOLUME2: equ CHAN_REGS+18 // volume (0 to 255) for buffer two
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RIGHT_VOLUME2: equ CHAN_REGS+19
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BACKUPH_SMP: equ CHAN_REGS+20 // start address backup
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BACKUPL_SMP: equ CHAN_REGS+21
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/**************************************************************/
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/* VOICE SAMPLE BUFFER DATAS */
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/**************************************************************/
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MEM_SAMP: equ CHAN_REGS+0x20
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data_end: equ MEM_SAMP+0x20
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/**************************************************************/
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/* SND OUTPUT DATAS */
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/**************************************************************/
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MEM_SND: equ data_end ; it need 2048 words (4096 bytes)
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/*** START CODE ***/
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/**************************************************************/
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/* EXCEPTION TABLE */
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/**************************************************************/
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jmp exception0
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jmp exception1
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jmp exception2
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jmp exception3
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jmp exception4
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jmp exception5
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jmp exception6
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jmp exception7
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lri $CONFIG, #0xff
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lri $SR,#0
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s16
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clr15
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m0
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/**************************************************************/
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/* main */
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/**************************************************************/
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main:
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// send init token to CPU
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si @DMBH, #0xdcd1
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si @DMBL, #0x0000
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si @DIRQ, #1
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recv_cmd:
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// check if previous mail is received from the CPU
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call wait_for_dsp_mail
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// wait a mail from CPU
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call wait_for_cpu_mail
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si @DMBH, #0xdcd1
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clr $ACC0
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lri $ACM0,#0xcdd1
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cmp
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jz sys_command
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clr $ACC1
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lrs $ACM1, @CMBL
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cmpi $ACM1, #0x111 // fill the internal sample buffer and process the voice internally
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jz input_samples
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cmpi $ACM1, #0x112 // get samples from the external buffer to the internal buffer and process the voice mixing the samples internally
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jz input_samples2
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cmpi $ACM1, #0x123 // get the address of the voice datas buffer (CHANNEL DATAS)
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jz get_data_addr
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cmpi $ACM1, #0x222 // process the voice mixing the samples internally
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jz input_next_samples
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cmpi $ACM1, #0x666 // send the samples for the internal buffer to the external buffer
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jz send_samples
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cmpi $ACM1, #0x777 // special: to dump the IROM Datas (remember disable others functions from the interrupt vector to use)
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jz rom_dump_word // (CMBH+0x8000) countain the address of IROM
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cmpi $ACM1, #0x888 // Used for test
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jz polla_loca
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cmpi $ACM1, #0x999
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jz task_terminate
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si @DMBL, #0x0004 // return 0 as ignore command
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si @DIRQ, #0x1 // set the interrupt
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jmp recv_cmd
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task_terminate:
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si @DMBL, #0x0003
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si @DIRQ, #0x1
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jmp recv_cmd
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sys_command:
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clr $ACC1
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lrs $ACM1, @CMBL
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cmpi $ACM1,#0x0001
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jz run_nexttask
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cmpi $ACM1,#0x0002
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jz 0x8000
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jmp recv_cmd
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run_nexttask:
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s16
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call wait_for_cpu_mail
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lrs $29,@CMBL
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call wait_for_cpu_mail
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lrs $29,@CMBL
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call wait_for_cpu_mail
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lrs $29,@CMBL
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call wait_for_cpu_mail
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lr $5,@CMBL
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andi $31,#0x0fff
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mrr $4,$31
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call wait_for_cpu_mail
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lr $7,@CMBL
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call wait_for_cpu_mail
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lr $6,@CMBL
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call wait_for_cpu_mail
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lr $0,@CMBL
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call wait_for_cpu_mail
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lrs $24,@CMBL
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andi $31,#0x0fff
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mrr $26,$31
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call wait_for_cpu_mail
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lrs $25,@CMBL
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call wait_for_cpu_mail
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lrs $27,@CMBL
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sbclr #0x05
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sbclr #0x06
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jmp 0x80b5
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halt
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/**************************************************************************************************************************************/
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// send the samples for the internal buffer to the external buffer
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send_samples:
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lri $AR0, #MEM_SND
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lris $AXL1, #DMA_TO_CPU;
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lri $AXL0, #NUM_SAMPLES*4 ; len
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lr $ACM0, @ADDRH_SND
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lr $ACL0, @ADDRL_SND
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call do_dma
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si @DMBL, #0x0004
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si @DIRQ, #0x1 // set the interrupt
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jmp recv_cmd
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/**************************************************************************************************************************************/
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// get the address of the voice datas buffer (CHANNEL DATAS)
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get_data_addr:
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call wait_for_cpu_mail
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lrs $ACM0, @CMBH
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lr $ACL0, @CMBL
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sr @MEM_VECTH, $ACM0
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sr @MEM_VECTL, $ACL0
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si @DIRQ, #0x0 // clear the interrupt
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jmp recv_cmd
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/**************************************************************************************************************************************/
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// fill the internal sample buffer and process the voice internally
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input_samples:
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clr $ACC0
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lr $ACM0, @MEM_VECTH
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lr $ACL0, @MEM_VECTL
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lris $AXL0, #0x0004
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sr @RETURN, $AXL0
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si @DIRQ, #0x0000
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// program DMA to get datas
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lri $AR0, #MEM_REG
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lris $AXL1, #DMA_TO_DSP
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lris $AXL0, #64 ; len
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call do_dma
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lri $AR1, #MEM_SND
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lri $ACL1, #0;
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lri $AXL0, #NUM_SAMPLES
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bloop $AXL0, loop_get1
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srri @$AR1, $ACL1
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srri @$AR1, $ACL1
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loop_get1:
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nop
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lr $ACM0, @ADDRH_SND
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lr $ACL0, @ADDRL_SND
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jmp start_main
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/**************************************************************************************************************************************/
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// get samples from the external buffer to the internal buffer and process the voice mixing the samples internally
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input_samples2:
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clr $ACC0
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lr $ACM0, @MEM_VECTH
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lr $ACL0, @MEM_VECTL
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lris $AXL0, #0x0004
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sr @RETURN, $AXL0
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si @DIRQ, #0x0000
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// program DMA to get datas
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lri $AR0, #MEM_REG
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lri $AXL1, #DMA_TO_DSP
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lris $AXL0, #64 ; len
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call do_dma
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lr $ACM0, @ADDRH_SND
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lr $ACL0, @ADDRL_SND
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lri $AR0, #MEM_SND
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lris $AXL1, #DMA_TO_DSP;
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lri $AXL0, #NUM_SAMPLES*4; len
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call do_dma
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jmp start_main
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/**************************************************************************************************************************************/
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// process the voice mixing the samples internally
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input_next_samples:
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clr $ACC0
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lr $ACM0, @MEM_VECTH
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lr $ACL0, @MEM_VECTL
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lris $AXL0, #0x0004
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sr @RETURN, $AXL0
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si @DIRQ, #0x0000
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// program DMA to get datas
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lri $AR0, #MEM_REG
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lris $AXL1, #DMA_TO_DSP
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lris $AXL0, #64 ; len
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call do_dma
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/**************************************************************************************************************************************/
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// mixing and control pitch to create 1024 Stereo Samples at 16 bits from here
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start_main:
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lri $R08, #48000
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// load the previous samples used
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lr $AXH0, @SMP_R
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lr $AXH1, @SMP_L
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// optimize the jump function to get MONO/STEREO 8/16 bits samples
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lr $ACM1, @FLAGSL_SMP
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andi $ACM1, #0x3
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addi $ACM1, #sample_selector
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mrr $AR3, $ACM1
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ilrr $ACM1, @$AR3
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mrr $AR3, $ACM1 // AR3 countain the jump loaded from sample selector
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clr $ACC0
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// test for channel paused
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lr $ACM0, @FLAGSL_SMP
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andcf $ACM0, #0x20
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jlz end_main
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// load the sample address
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lr $ACM0, @ADDRH_SMP
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lr $ACL0, @ADDRL_SMP
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// test if ADDR_SMP & ADDR2H_SMP are zero
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tst $ACC0
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jnz do_not_change1
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// set return as "change of buffer"
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lris $AXL0, #0x0004
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sr @RETURN, $AXL0
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// change to buffer 2 if it is possible
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call change_buffer
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// stops if again 0 address
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tst $ACC0
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jz save_datas_end
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do_not_change1:
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// backup the external sample address
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mrr $IX2, $ACM0
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mrr $IX3, $ACL0
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// load the counter pitch
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//lr $r08, @COUNTERH_SMP
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//lr $r09, @COUNTERL_SMP
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// load the end address of the samples
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lr $r0a, @ADDREH_SMP
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lr $r0b, @ADDREL_SMP
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// load AR1 with internal buffer address
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lri $AR1, #MEM_SND
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/////////////////////////////////////
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// delay time section
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/////////////////////////////////////
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// load AXL0 with the samples to be processed
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lri $AXL0, #NUM_SAMPLES
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// test if DELAY == 0 and skip or not
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clr $ACC0
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clr $ACC1
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lr $ACH0, @DELAYH_SND
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lr $ACM0, @DELAYL_SND
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tst $ACC0
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jz no_delay
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// samples left and right to 0
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lris $AXH0, #0
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lris $AXH1, #0
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// load the samples to be processed in ACM1
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mrr $ACM1, $AXL0
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l_delay:
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iar $AR1 // skip two samples
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iar $AR1
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decm $ACM1
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jz exit_delay1 // exit1 if samples to be processed == 0
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decm $ACM0
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jz exit_delay2 // exit2 if delay time == 0
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jmp l_delay
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// store the remanent delay and ends
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exit_delay1:
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decm $ACM0
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sr @DELAYH_SND, $ACH0
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sr @DELAYL_SND, $ACM0
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lris $AXL0,#0 ; exit from loop
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jmp no_delay
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exit_delay2:
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// store delay=0 and continue
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sr @DELAYH_SND, $ACH0
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sr @DELAYL_SND, $ACM0
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mrr $AXL0, $ACL1 // load remanent samples to be processed in AXL0
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no_delay:
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/////////////////////////////////////
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// end of delay time section
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/////////////////////////////////////
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)" // Work around C2026 on MSVC, which allows at most 16380 single-byte characters in a single
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// non-concatenated string literal (but you can concatenate multiple shorter string literals to
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// produce a longer string just fine). (This comment is not part of the actual test program,
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// and instead there is a single blank line at this location.)
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R"(
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/* bucle de generacion de samples */
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// load the sample buffer with address aligned to 32 bytes blocks (first time)
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si @DSCR, #DMA_TO_DSP // very important!: load_smp_addr_align and jump_load_smp_addr need fix this DMA Register (I gain some cycles so)
|
|
|
|
// load_smp_addr_align input: $IX2:$IX3
|
|
|
|
call load_smp_addr_align
|
|
|
|
// load the volume registers
|
|
|
|
lr $IX0, @LEFT_VOLUME
|
|
lr $IX1, @RIGHT_VOLUME
|
|
|
|
// test the freq value
|
|
|
|
clr $ACC0
|
|
lr $ACH0, @FREQH_SMP
|
|
lr $ACM0, @FREQL_SMP
|
|
|
|
clr $ACC1
|
|
;lri $ACM1,#48000
|
|
mrr $ACM1, $R08
|
|
cmp
|
|
|
|
// select the output of the routine to process stereo-mono 8/16bits samples
|
|
|
|
lri $AR0, #get_sample // fast method <=48000
|
|
|
|
// if number is greater freq>48000 fix different routine
|
|
|
|
ifg
|
|
lri $AR0, #get_sample2 // slow method >48000
|
|
|
|
// loops for samples to be processed
|
|
|
|
bloop $AXL0, loop_end
|
|
|
|
//srri @$AR1, $AXH0 // put sample R
|
|
//srri @$AR1, $AXH1 // put sample L
|
|
|
|
// Mix right sample section
|
|
|
|
lrr $ACL0, @$AR1 // load in ACL0 the right sample from the internal buffer
|
|
movax $ACC1, $AXL1 // big trick :) load the current sample <<16 and sign extended
|
|
|
|
asl $ACC0,#24 // convert sample from buffer to 24 bit number with sign extended (ACH0:ACM0)
|
|
asr $ACC0,#-8
|
|
|
|
add $ACC0,$ACC1 // current_sample+buffer sample
|
|
|
|
cmpi $ACM0,#32767 // limit to 32767
|
|
jle right_skip
|
|
|
|
lri $ACM0, #32767
|
|
jmp right_skip2
|
|
|
|
right_skip:
|
|
|
|
cmpi $ACM0,#-32768 // limit to -32768
|
|
ifle
|
|
lri $ACM0, #-32768
|
|
|
|
right_skip2:
|
|
|
|
srri @$AR1, $ACM0 // store the right sample mixed to the internal buffer and increment AR1
|
|
|
|
// Mix left sample section
|
|
|
|
lrr $ACL0, @$AR1 // load in ACL0 the left sample from the internal buffer
|
|
|
|
movax $ACC1, $AXL0 // big trick :) load the current sample <<16 and sign extended
|
|
|
|
asl $ACC0, #24 // convert sample from buffer to 24 bit number with sign extended (ACH0:ACM0)
|
|
asr $ACC0, #-8
|
|
|
|
add $ACC0, $ACC1 // current_sample+buffer sample
|
|
|
|
cmpi $ACM0,#32767 // limit to 32767
|
|
jle left_skip
|
|
|
|
lri $ACM0, #32767
|
|
jmp left_skip2
|
|
|
|
left_skip:
|
|
|
|
cmpi $ACM0,#-32768 // limit to -32768
|
|
ifle
|
|
lri $ACM0, #-32768
|
|
|
|
left_skip2:
|
|
|
|
srri @$AR1, $ACM0 // store the left sample mixed to the internal buffer and increment AR1
|
|
|
|
// adds the counter with the voice frequency and test if it >=48000 to get the next sample
|
|
|
|
clr $ACC1
|
|
lr $ACH1, @COUNTERH_SMP
|
|
lr $ACM1, @COUNTERL_SMP
|
|
clr $ACC0
|
|
lr $ACH0, @FREQH_SMP
|
|
lr $ACM0, @FREQL_SMP
|
|
|
|
add $ACC1,$ACC0
|
|
clr $ACC0
|
|
//lri $ACM0,#48000
|
|
mrr $ACM0, $R08
|
|
|
|
cmp
|
|
|
|
jrnc $AR0 //get_sample or get_sample2 method
|
|
|
|
sr @COUNTERH_SMP, $ACH1
|
|
sr @COUNTERL_SMP, $ACM1
|
|
|
|
jmp loop_end
|
|
|
|
// get a new sample for freq > 48000 Hz
|
|
|
|
get_sample2: // slow method
|
|
|
|
sub $ACC1,$ACC0 // restore the counter
|
|
|
|
// restore the external sample buffer address
|
|
|
|
clr $ACC0
|
|
mrr $ACM0, $IX2 // load ADDRH_SMP
|
|
mrr $ACL0, $IX3 // load ADDRL_SMP
|
|
|
|
lr $AXL1, @FLAGSH_SMP // add the step to get the next samples
|
|
addaxl $ACC0, $AXL1
|
|
|
|
mrr $IX2, $ACM0 // store ADDRH_SMP
|
|
mrr $IX3, $ACL0 // store ADDRL_SMP
|
|
|
|
mrr $ACM0, $ACL0
|
|
andf $ACM0, #0x1f
|
|
|
|
// load_smp_addr_align input: $IX2:$IX3 call if (ACM0 & 0x1f)==0
|
|
|
|
calllz load_smp_addr_align
|
|
|
|
clr $ACC0
|
|
//lri $ACM0,#48000
|
|
mrr $ACM0, $R08
|
|
|
|
cmp
|
|
|
|
jle get_sample2
|
|
|
|
sr @COUNTERH_SMP, $ACH1
|
|
sr @COUNTERL_SMP, $ACM1
|
|
|
|
mrr $ACM0, $IX2 // load ADDRH_SMP
|
|
mrr $ACL0, $IX3 // load ADDRL_SMP
|
|
|
|
clr $ACC1
|
|
mrr $ACM1, $r0a // load ADDREH_SMP
|
|
mrr $ACL1, $r0b // load ADDREL_SMP
|
|
|
|
// compares if the current address is >= end address to change the buffer or stops
|
|
|
|
cmp
|
|
|
|
// if addr>addr end get a new buffer (if you uses double buffer)
|
|
|
|
jc get_new_buffer
|
|
|
|
// load samples from dma, return $ar2 with the addr to get the samples and return using $ar0 to the routine to process 8-16bits Mono/Stereo
|
|
|
|
jmp jump_load_smp_addr
|
|
|
|
// get a new sample for freq <= 48000 Hz
|
|
|
|
get_sample: // fast method
|
|
|
|
sub $ACC1,$ACC0 // restore the counter
|
|
sr @COUNTERH_SMP, $ACH1
|
|
sr @COUNTERL_SMP, $ACM1
|
|
|
|
// restore the external sample buffer address
|
|
|
|
clr $ACC0
|
|
mrr $ACM0, $IX2 // load ADDRH_SMP
|
|
mrr $ACL0, $IX3 // load ADDRL_SMP
|
|
|
|
lr $AXL1, @FLAGSH_SMP // add the step to get the next samples
|
|
addaxl $ACC0, $AXL1
|
|
|
|
clr $ACC1
|
|
mrr $ACM1, $r0a // load ADDREH_SMP
|
|
mrr $ACL1, $r0b // load ADDREL_SMP
|
|
|
|
// compares if the current address is >= end address to change the buffer or stops
|
|
|
|
cmp
|
|
jc get_new_buffer
|
|
|
|
// load the new sample from the buffer
|
|
|
|
mrr $IX2, $ACM0 // store ADDRH_SMP
|
|
mrr $IX3, $ACL0 // store ADDRL_SMP
|
|
|
|
// load samples from dma, return $ar2 with the addr and return using $ar0 to the routine to process 8-16bits Mono/Stereo or addr_get_sample_again
|
|
|
|
jmp jump_load_smp_addr
|
|
|
|
sample_selector:
|
|
cw mono_8bits
|
|
cw mono_16bits
|
|
cw stereo_8bits
|
|
cw stereo_16bits
|
|
|
|
get_new_buffer:
|
|
|
|
// set return as "change of buffer": it need to change the sample address
|
|
|
|
lris $AXL0, #0x0004
|
|
sr @RETURN, $AXL0
|
|
|
|
call change_buffer // load add from addr2
|
|
|
|
// addr is 0 ? go to zero_samples and exit
|
|
|
|
tst $acc0
|
|
jz zero_samples
|
|
|
|
// load_smp_addr_align input: $IX2:$IX3
|
|
|
|
call load_smp_addr_align // force the load the samples cached (address aligned)
|
|
|
|
// jump_load_smp_addr: $IX2:$IX3
|
|
// load samples from dma, return $ar2 with the addr to get the samples and return using $ar0 to the routine to process 8-16bits Mono/Stereo
|
|
|
|
jmp jump_load_smp_addr
|
|
|
|
// set to 0 the current samples
|
|
|
|
zero_samples:
|
|
|
|
lris $AXH0, #0
|
|
lris $AXH1, #0
|
|
jmp out_samp
|
|
|
|
mono_8bits:
|
|
|
|
// 8 bits mono
|
|
mrr $ACM1, $IX3
|
|
lrri $ACL0, @$AR2
|
|
andf $ACM1, #0x1
|
|
|
|
iflz // obtain sample0-sample1 from 8bits packet
|
|
asr $ACC0, #-8
|
|
asl $ACC0, #8
|
|
|
|
mrr $AXH1,$ACL0
|
|
mrr $AXH0,$ACL0
|
|
jmp out_samp
|
|
|
|
stereo_8bits:
|
|
|
|
// 8 bits stereo
|
|
|
|
lrri $ACL0, @$AR2
|
|
mrr $ACM0, $ACL0
|
|
andi $ACM0, #0xff00
|
|
mrr $AXH1, $ACM0
|
|
lsl $ACC0, #8
|
|
mrr $AXH0, $ACL0
|
|
|
|
jmp out_samp
|
|
|
|
mono_16bits:
|
|
|
|
// 16 bits mono
|
|
|
|
lrri $AXH1, @$AR2
|
|
mrr $AXH0,$AXH1
|
|
jmp out_samp
|
|
|
|
stereo_16bits:
|
|
|
|
// 16 bits stereo
|
|
|
|
lrri $AXH1, @$AR2
|
|
lrri $AXH0, @$AR2
|
|
|
|
out_samp:
|
|
|
|
// multiply sample x volume
|
|
|
|
// LEFT_VOLUME
|
|
mrr $AXL0,$IX0
|
|
mul $AXL0,$AXH0
|
|
movp $ACC0
|
|
asr $ACC0,#-8
|
|
mrr $AXH0, $ACL0
|
|
|
|
// RIGHT VOLUME
|
|
mrr $AXL1,$IX1
|
|
mul $AXL1,$AXH1
|
|
movp $ACC0
|
|
asr $ACC0,#-8
|
|
mrr $AXH1, $ACL0
|
|
|
|
loop_end:
|
|
nop
|
|
|
|
end_process:
|
|
|
|
// load the sample address
|
|
|
|
clr $ACC0
|
|
mrr $ACM0, $IX2
|
|
mrr $ACL0, $IX3
|
|
|
|
tst $ACC0
|
|
jnz save_datas_end
|
|
|
|
// set return as "change of buffer"
|
|
|
|
lris $AXL0, #0x0004
|
|
sr @RETURN, $AXL0
|
|
|
|
// change to buffer 2 if it is possible
|
|
|
|
call change_buffer
|
|
|
|
save_datas_end:
|
|
|
|
sr @ADDRH_SMP, $IX2
|
|
sr @ADDRL_SMP, $IX3
|
|
sr @SMP_R, $AXH0
|
|
sr @SMP_L, $AXH1
|
|
|
|
end_main:
|
|
|
|
// program DMA to send the CHANNEL DATAS changed
|
|
|
|
clr $ACC0
|
|
lr $ACM0, @MEM_VECTH
|
|
lr $ACL0, @MEM_VECTL
|
|
|
|
lri $AR0, #MEM_REG
|
|
lris $AXL1, #DMA_TO_CPU
|
|
lris $AXL0, #64 ; len
|
|
|
|
call do_dma
|
|
|
|
si @DMBH, #0xdcd1
|
|
lr $ACL0, @RETURN
|
|
|
|
sr @DMBL, $ACL0
|
|
si @DIRQ, #0x1 // set the interrupt
|
|
|
|
jmp recv_cmd
|
|
|
|
change_buffer:
|
|
|
|
clr $ACC0
|
|
lr $ACM0, @LEFT_VOLUME2
|
|
lr $ACL0, @RIGHT_VOLUME2
|
|
sr @LEFT_VOLUME, $ACM0
|
|
sr @RIGHT_VOLUME, $ACL0
|
|
mrr $IX0, $ACM0
|
|
mrr $IX1, $ACL0
|
|
|
|
lr $ACM0, @ADDR2EH_SMP
|
|
lr $ACL0, @ADDR2EL_SMP
|
|
sr @ADDREH_SMP, $ACM0
|
|
sr @ADDREL_SMP, $ACL0
|
|
mrr $r0a, $ACM0
|
|
mrr $r0b, $ACL0
|
|
|
|
lr $ACM0, @ADDR2H_SMP
|
|
lr $ACL0, @ADDR2L_SMP
|
|
sr @ADDRH_SMP, $ACM0
|
|
sr @ADDRL_SMP, $ACL0
|
|
sr @BACKUPH_SMP, $ACM0
|
|
sr @BACKUPL_SMP, $ACL0
|
|
mrr $IX2, $ACM0
|
|
mrr $IX3, $ACL0
|
|
|
|
lr $ACM1, @FLAGSL_SMP
|
|
andcf $ACM1, #0x4
|
|
retlz
|
|
|
|
sr @ADDR2H_SMP, $ACH0
|
|
sr @ADDR2L_SMP, $ACH0
|
|
sr @ADDR2EH_SMP, $ACH0
|
|
sr @ADDR2EL_SMP, $ACH0
|
|
ret
|
|
|
|
/**************************************************************/
|
|
/* DMA ROUTINE */
|
|
/**************************************************************/
|
|
|
|
do_dma:
|
|
|
|
sr @DSMAH, $ACM0
|
|
sr @DSMAL, $ACL0
|
|
sr @DSPA, $AR0
|
|
sr @DSCR, $AXL1
|
|
sr @DSBL, $AXL0
|
|
|
|
wait_dma:
|
|
|
|
lrs $ACM1, @DSCR
|
|
andcf $ACM1, #0x4
|
|
jlz wait_dma
|
|
ret
|
|
|
|
|
|
wait_for_dsp_mail:
|
|
|
|
lrs $ACM1, @DMBH
|
|
andcf $ACM1, #0x8000
|
|
jlz wait_for_dsp_mail
|
|
ret
|
|
|
|
wait_for_cpu_mail:
|
|
|
|
lrs $ACM1, @cmbh
|
|
andcf $ACM1, #0x8000
|
|
jlnz wait_for_cpu_mail
|
|
ret
|
|
|
|
load_smp_addr_align:
|
|
|
|
mrr $ACL0, $IX3 // load ADDRL_SMP
|
|
|
|
lsr $ACC0, #-5
|
|
lsl $ACC0, #5
|
|
sr @DSMAH, $IX2
|
|
sr @DSMAL, $ACL0
|
|
si @DSPA, #MEM_SAMP
|
|
;si @DSCR, #DMA_TO_DSP
|
|
si @DSBL, #0x20
|
|
|
|
wait_dma1:
|
|
lrs $ACM0, @DSCR
|
|
andcf $ACM0, #0x4
|
|
jlz wait_dma1
|
|
|
|
lri $AR2, #MEM_SAMP
|
|
ret
|
|
|
|
|
|
//////////////////////////////////////////
|
|
|
|
jump_load_smp_addr:
|
|
|
|
mrr $ACM0, $IX3 // load ADDRL_SMP
|
|
asr $ACC0, #-1
|
|
andi $ACM0, #0xf
|
|
jz jump_load_smp_dma
|
|
|
|
addi $ACM0, #MEM_SAMP
|
|
mrr $AR2, $ACM0
|
|
jmpr $AR3
|
|
|
|
jump_load_smp_dma:
|
|
|
|
sr @DSMAH, $IX2
|
|
sr @DSMAL, $IX3
|
|
si @DSPA, #MEM_SAMP
|
|
;si @DSCR, #DMA_TO_DSP // to gain some cycles
|
|
si @DSBL, #0x20
|
|
|
|
wait_dma2:
|
|
lrs $ACM0, @DSCR
|
|
andcf $ACM0, #0x4
|
|
jlz wait_dma2
|
|
|
|
lri $AR2, #MEM_SAMP
|
|
jmpr $AR3
|
|
|
|
// exception table
|
|
|
|
exception0: // RESET
|
|
rti
|
|
|
|
exception1: // STACK OVERFLOW
|
|
rti
|
|
|
|
exception2:
|
|
rti
|
|
|
|
exception3:
|
|
rti
|
|
|
|
exception4:
|
|
rti
|
|
|
|
exception5: // ACCELERATOR ADDRESS OVERFLOW
|
|
rti
|
|
|
|
exception6:
|
|
rti
|
|
|
|
exception7:
|
|
rti
|
|
|
|
// routine to read a word of the IROM space
|
|
|
|
rom_dump_word:
|
|
|
|
clr $ACC0
|
|
|
|
lr $ACM0, @CMBH
|
|
ori $ACM0, #0x8000
|
|
mrr $AR0, $ACM0
|
|
clr $ACC0
|
|
ilrr $ACM0, @$AR0
|
|
sr @DMBH, $ACL0
|
|
sr @DMBL, $ACM0
|
|
;si @DIRQ, #0x1 // set the interrupt
|
|
clr $ACC0
|
|
jmp recv_cmd
|
|
|
|
polla_loca:
|
|
|
|
clr $ACC0
|
|
lri $acm0, #0x0
|
|
andf $acm0,#0x1
|
|
|
|
sr @DMBH, $sr
|
|
sr @DMBL, $acm0
|
|
;si @DIRQ, #0x1 // set the interrupt
|
|
clr $ACC0
|
|
jmp recv_cmd
|
|
|
|
)";
|