mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2024-11-15 13:57:57 -07:00
f32b771f7a
This avoids some warnings, which were originally fixed by ignoring loads with a value of zero (see 636bedb207 / #3242).
Note that FifoCI will report some changes, but only on the first frame; these seem to be timing related as they don't happen if a different write is used to replace skipped ones.
646 lines
21 KiB
C++
646 lines
21 KiB
C++
// Copyright 2008 Dolphin Emulator Project
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// Licensed under GPLv2+
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// Refer to the license.txt file included.
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#include "VideoCommon/XFStructs.h"
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#include "Common/BitUtils.h"
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#include "Common/CommonTypes.h"
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#include "Common/Logging/Log.h"
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#include "Common/Swap.h"
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#include "Core/DolphinAnalytics.h"
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#include "Core/HW/Memmap.h"
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#include "VideoCommon/CPMemory.h"
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#include "VideoCommon/DataReader.h"
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#include "VideoCommon/Fifo.h"
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#include "VideoCommon/GeometryShaderManager.h"
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#include "VideoCommon/PixelShaderManager.h"
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#include "VideoCommon/VertexManagerBase.h"
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#include "VideoCommon/VertexShaderManager.h"
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#include "VideoCommon/XFMemory.h"
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static void XFMemWritten(u32 transferSize, u32 baseAddress)
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{
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g_vertex_manager->Flush();
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VertexShaderManager::InvalidateXFRange(baseAddress, baseAddress + transferSize);
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}
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static void XFRegWritten(int transferSize, u32 baseAddress, DataReader src)
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{
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u32 address = baseAddress;
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u32 dataIndex = 0;
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while (transferSize > 0 && address < XFMEM_REGISTERS_END)
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{
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u32 newValue = src.Peek<u32>(dataIndex * sizeof(u32));
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u32 nextAddress = address + 1;
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switch (address)
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{
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case XFMEM_ERROR:
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case XFMEM_DIAG:
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case XFMEM_STATE0: // internal state 0
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case XFMEM_STATE1: // internal state 1
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case XFMEM_CLOCK:
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case XFMEM_SETGPMETRIC:
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nextAddress = 0x1007;
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break;
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case XFMEM_CLIPDISABLE:
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// if (data & 1) {} // disable clipping detection
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// if (data & 2) {} // disable trivial rejection
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// if (data & 4) {} // disable cpoly clipping acceleration
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break;
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case XFMEM_VTXSPECS: //__GXXfVtxSpecs, wrote 0004
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break;
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case XFMEM_SETNUMCHAN:
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if (xfmem.numChan.numColorChans != (newValue & 3))
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g_vertex_manager->Flush();
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VertexShaderManager::SetLightingConfigChanged();
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break;
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case XFMEM_SETCHAN0_AMBCOLOR: // Channel Ambient Color
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case XFMEM_SETCHAN1_AMBCOLOR:
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{
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u8 chan = address - XFMEM_SETCHAN0_AMBCOLOR;
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if (xfmem.ambColor[chan] != newValue)
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{
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g_vertex_manager->Flush();
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VertexShaderManager::SetMaterialColorChanged(chan);
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}
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break;
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}
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case XFMEM_SETCHAN0_MATCOLOR: // Channel Material Color
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case XFMEM_SETCHAN1_MATCOLOR:
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{
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u8 chan = address - XFMEM_SETCHAN0_MATCOLOR;
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if (xfmem.matColor[chan] != newValue)
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{
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g_vertex_manager->Flush();
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VertexShaderManager::SetMaterialColorChanged(chan + 2);
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}
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break;
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}
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case XFMEM_SETCHAN0_COLOR: // Channel Color
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case XFMEM_SETCHAN1_COLOR:
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case XFMEM_SETCHAN0_ALPHA: // Channel Alpha
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case XFMEM_SETCHAN1_ALPHA:
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if (((u32*)&xfmem)[address] != (newValue & 0x7fff))
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g_vertex_manager->Flush();
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VertexShaderManager::SetLightingConfigChanged();
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break;
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case XFMEM_DUALTEX:
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if (xfmem.dualTexTrans.enabled != bool(newValue & 1))
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g_vertex_manager->Flush();
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VertexShaderManager::SetTexMatrixInfoChanged(-1);
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break;
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case XFMEM_SETMATRIXINDA:
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VertexShaderManager::SetTexMatrixChangedA(newValue);
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break;
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case XFMEM_SETMATRIXINDB:
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VertexShaderManager::SetTexMatrixChangedB(newValue);
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break;
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case XFMEM_SETVIEWPORT:
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case XFMEM_SETVIEWPORT + 1:
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case XFMEM_SETVIEWPORT + 2:
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case XFMEM_SETVIEWPORT + 3:
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case XFMEM_SETVIEWPORT + 4:
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case XFMEM_SETVIEWPORT + 5:
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g_vertex_manager->Flush();
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VertexShaderManager::SetViewportChanged();
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PixelShaderManager::SetViewportChanged();
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GeometryShaderManager::SetViewportChanged();
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nextAddress = XFMEM_SETVIEWPORT + 6;
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break;
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case XFMEM_SETPROJECTION:
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case XFMEM_SETPROJECTION + 1:
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case XFMEM_SETPROJECTION + 2:
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case XFMEM_SETPROJECTION + 3:
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case XFMEM_SETPROJECTION + 4:
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case XFMEM_SETPROJECTION + 5:
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case XFMEM_SETPROJECTION + 6:
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g_vertex_manager->Flush();
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VertexShaderManager::SetProjectionChanged();
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GeometryShaderManager::SetProjectionChanged();
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nextAddress = XFMEM_SETPROJECTION + 7;
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break;
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case XFMEM_SETNUMTEXGENS: // GXSetNumTexGens
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if (xfmem.numTexGen.numTexGens != (newValue & 15))
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g_vertex_manager->Flush();
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break;
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case XFMEM_SETTEXMTXINFO:
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case XFMEM_SETTEXMTXINFO + 1:
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case XFMEM_SETTEXMTXINFO + 2:
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case XFMEM_SETTEXMTXINFO + 3:
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case XFMEM_SETTEXMTXINFO + 4:
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case XFMEM_SETTEXMTXINFO + 5:
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case XFMEM_SETTEXMTXINFO + 6:
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case XFMEM_SETTEXMTXINFO + 7:
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g_vertex_manager->Flush();
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VertexShaderManager::SetTexMatrixInfoChanged(address - XFMEM_SETTEXMTXINFO);
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nextAddress = XFMEM_SETTEXMTXINFO + 8;
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break;
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case XFMEM_SETPOSTMTXINFO:
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case XFMEM_SETPOSTMTXINFO + 1:
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case XFMEM_SETPOSTMTXINFO + 2:
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case XFMEM_SETPOSTMTXINFO + 3:
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case XFMEM_SETPOSTMTXINFO + 4:
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case XFMEM_SETPOSTMTXINFO + 5:
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case XFMEM_SETPOSTMTXINFO + 6:
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case XFMEM_SETPOSTMTXINFO + 7:
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g_vertex_manager->Flush();
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VertexShaderManager::SetTexMatrixInfoChanged(address - XFMEM_SETPOSTMTXINFO);
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nextAddress = XFMEM_SETPOSTMTXINFO + 8;
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break;
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// --------------
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// Unknown Regs
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// --------------
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// Maybe these are for Normals?
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case 0x1048: // xfmem.texcoords[0].nrmmtxinfo.hex = data; break; ??
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case 0x1049:
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case 0x104a:
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case 0x104b:
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case 0x104c:
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case 0x104d:
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case 0x104e:
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case 0x104f:
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DolphinAnalytics::Instance().ReportGameQuirk(GameQuirk::USES_UNKNOWN_XF_COMMAND);
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DEBUG_LOG_FMT(VIDEO, "Possible Normal Mtx XF reg?: {:x}={:x}", address, newValue);
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break;
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case 0x1013:
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case 0x1014:
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case 0x1015:
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case 0x1016:
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case 0x1017:
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default:
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DolphinAnalytics::Instance().ReportGameQuirk(GameQuirk::USES_UNKNOWN_XF_COMMAND);
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WARN_LOG_FMT(VIDEO, "Unknown XF Reg: {:x}={:x}", address, newValue);
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break;
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}
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int transferred = nextAddress - address;
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address = nextAddress;
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transferSize -= transferred;
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dataIndex += transferred;
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}
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}
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void LoadXFReg(u32 transferSize, u32 baseAddress, DataReader src)
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{
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// do not allow writes past registers
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if (baseAddress + transferSize > XFMEM_REGISTERS_END)
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{
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WARN_LOG_FMT(VIDEO, "XF load exceeds address space: {:x} {} bytes", baseAddress, transferSize);
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DolphinAnalytics::Instance().ReportGameQuirk(GameQuirk::USES_UNKNOWN_XF_COMMAND);
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if (baseAddress >= XFMEM_REGISTERS_END)
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transferSize = 0;
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else
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transferSize = XFMEM_REGISTERS_END - baseAddress;
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}
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// write to XF mem
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if (baseAddress < XFMEM_REGISTERS_START && transferSize > 0)
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{
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u32 end = baseAddress + transferSize;
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u32 xfMemBase = baseAddress;
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u32 xfMemTransferSize = transferSize;
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if (end >= XFMEM_REGISTERS_START)
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{
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xfMemTransferSize = XFMEM_REGISTERS_START - baseAddress;
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baseAddress = XFMEM_REGISTERS_START;
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transferSize = end - XFMEM_REGISTERS_START;
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}
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else
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{
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transferSize = 0;
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}
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XFMemWritten(xfMemTransferSize, xfMemBase);
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for (u32 i = 0; i < xfMemTransferSize; i++)
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{
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((u32*)&xfmem)[xfMemBase + i] = src.Read<u32>();
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}
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}
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// write to XF regs
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if (transferSize > 0)
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{
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XFRegWritten(transferSize, baseAddress, src);
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for (u32 i = 0; i < transferSize; i++)
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{
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((u32*)&xfmem)[baseAddress + i] = src.Read<u32>();
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}
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}
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}
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// TODO - verify that it is correct. Seems to work, though.
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void LoadIndexedXF(u32 val, int refarray)
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{
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int index = val >> 16;
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int address = val & 0xFFF; // check mask
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int size = ((val >> 12) & 0xF) + 1;
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// load stuff from array to address in xf mem
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u32* currData = (u32*)(&xfmem) + address;
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u32* newData;
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if (Fifo::UseDeterministicGPUThread())
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{
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newData = (u32*)Fifo::PopFifoAuxBuffer(size * sizeof(u32));
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}
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else
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{
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newData = (u32*)Memory::GetPointer(g_main_cp_state.array_bases[refarray] +
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g_main_cp_state.array_strides[refarray] * index);
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}
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bool changed = false;
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for (int i = 0; i < size; ++i)
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{
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if (currData[i] != Common::swap32(newData[i]))
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{
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changed = true;
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XFMemWritten(size, address);
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break;
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}
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}
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if (changed)
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{
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for (int i = 0; i < size; ++i)
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currData[i] = Common::swap32(newData[i]);
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}
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}
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void PreprocessIndexedXF(u32 val, int refarray)
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{
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const u32 index = val >> 16;
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const u32 size = ((val >> 12) & 0xF) + 1;
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const u8* new_data = Memory::GetPointer(g_preprocess_cp_state.array_bases[refarray] +
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g_preprocess_cp_state.array_strides[refarray] * index);
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const size_t buf_size = size * sizeof(u32);
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Fifo::PushFifoAuxBuffer(new_data, buf_size);
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}
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std::pair<std::string, std::string> GetXFRegInfo(u32 address, u32 value)
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{
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// Macro to set the register name and make sure it was written correctly via compile time assertion
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#define RegName(reg) ((void)(reg), #reg)
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#define DescriptionlessReg(reg) std::make_pair(RegName(reg), "");
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switch (address)
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{
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case XFMEM_ERROR:
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return DescriptionlessReg(XFMEM_ERROR);
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case XFMEM_DIAG:
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return DescriptionlessReg(XFMEM_DIAG);
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case XFMEM_STATE0: // internal state 0
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return std::make_pair(RegName(XFMEM_STATE0), "internal state 0");
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case XFMEM_STATE1: // internal state 1
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return std::make_pair(RegName(XFMEM_STATE1), "internal state 1");
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case XFMEM_CLOCK:
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return DescriptionlessReg(XFMEM_CLOCK);
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case XFMEM_SETGPMETRIC:
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return DescriptionlessReg(XFMEM_SETGPMETRIC);
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case XFMEM_CLIPDISABLE:
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return std::make_pair(RegName(XFMEM_CLIPDISABLE), fmt::to_string(ClipDisable{.hex = value}));
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case XFMEM_VTXSPECS:
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return std::make_pair(RegName(XFMEM_VTXSPECS), fmt::to_string(INVTXSPEC{.hex = value}));
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case XFMEM_SETNUMCHAN:
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return std::make_pair(RegName(XFMEM_SETNUMCHAN),
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fmt::format("Number of color channels: {}", value & 3));
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break;
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case XFMEM_SETCHAN0_AMBCOLOR:
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return std::make_pair(RegName(XFMEM_SETCHAN0_AMBCOLOR),
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fmt::format("Channel 0 Ambient Color: {:06x}", value));
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case XFMEM_SETCHAN1_AMBCOLOR:
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return std::make_pair(RegName(XFMEM_SETCHAN1_AMBCOLOR),
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fmt::format("Channel 1 Ambient Color: {:06x}", value));
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case XFMEM_SETCHAN0_MATCOLOR:
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return std::make_pair(RegName(XFMEM_SETCHAN0_MATCOLOR),
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fmt::format("Channel 0 Material Color: {:06x}", value));
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case XFMEM_SETCHAN1_MATCOLOR:
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return std::make_pair(RegName(XFMEM_SETCHAN1_MATCOLOR),
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fmt::format("Channel 1 Material Color: {:06x}", value));
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case XFMEM_SETCHAN0_COLOR: // Channel Color
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return std::make_pair(RegName(XFMEM_SETCHAN0_COLOR),
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fmt::format("Channel 0 Color config:\n{}", LitChannel{.hex = value}));
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case XFMEM_SETCHAN1_COLOR:
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return std::make_pair(RegName(XFMEM_SETCHAN1_COLOR),
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fmt::format("Channel 1 Color config:\n{}", LitChannel{.hex = value}));
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case XFMEM_SETCHAN0_ALPHA: // Channel Alpha
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return std::make_pair(RegName(XFMEM_SETCHAN0_ALPHA),
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fmt::format("Channel 0 Alpha config:\n{}", LitChannel{.hex = value}));
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case XFMEM_SETCHAN1_ALPHA:
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return std::make_pair(RegName(XFMEM_SETCHAN1_ALPHA),
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fmt::format("Channel 1 Alpha config:\n{}", LitChannel{.hex = value}));
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case XFMEM_DUALTEX:
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return std::make_pair(RegName(XFMEM_DUALTEX),
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fmt::format("Dual Tex Trans {}", (value & 1) ? "enabled" : "disabled"));
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case XFMEM_SETMATRIXINDA:
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return std::make_pair(RegName(XFMEM_SETMATRIXINDA),
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fmt::format("Matrix index A:\n{}", TMatrixIndexA{.Hex = value}));
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case XFMEM_SETMATRIXINDB:
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return std::make_pair(RegName(XFMEM_SETMATRIXINDB),
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fmt::format("Matrix index B:\n{}", TMatrixIndexB{.Hex = value}));
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case XFMEM_SETVIEWPORT:
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return std::make_pair(RegName(XFMEM_SETVIEWPORT + 0),
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fmt::format("Viewport width: {}", Common::BitCast<float>(value)));
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case XFMEM_SETVIEWPORT + 1:
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return std::make_pair(RegName(XFMEM_SETVIEWPORT + 1),
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fmt::format("Viewport height: {}", Common::BitCast<float>(value)));
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case XFMEM_SETVIEWPORT + 2:
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return std::make_pair(RegName(XFMEM_SETVIEWPORT + 2),
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fmt::format("Viewport z range: {}", Common::BitCast<float>(value)));
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case XFMEM_SETVIEWPORT + 3:
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return std::make_pair(RegName(XFMEM_SETVIEWPORT + 3),
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fmt::format("Viewport x origin: {}", Common::BitCast<float>(value)));
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case XFMEM_SETVIEWPORT + 4:
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return std::make_pair(RegName(XFMEM_SETVIEWPORT + 4),
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fmt::format("Viewport y origin: {}", Common::BitCast<float>(value)));
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case XFMEM_SETVIEWPORT + 5:
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return std::make_pair(RegName(XFMEM_SETVIEWPORT + 5),
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fmt::format("Viewport far z: {}", Common::BitCast<float>(value)));
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break;
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case XFMEM_SETPROJECTION:
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return std::make_pair(RegName(XFMEM_SETPROJECTION + 0),
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fmt::format("Projection[0]: {}", Common::BitCast<float>(value)));
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case XFMEM_SETPROJECTION + 1:
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return std::make_pair(RegName(XFMEM_SETPROJECTION + 1),
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fmt::format("Projection[1]: {}", Common::BitCast<float>(value)));
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case XFMEM_SETPROJECTION + 2:
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return std::make_pair(RegName(XFMEM_SETPROJECTION + 2),
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fmt::format("Projection[2]: {}", Common::BitCast<float>(value)));
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case XFMEM_SETPROJECTION + 3:
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return std::make_pair(RegName(XFMEM_SETPROJECTION + 3),
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fmt::format("Projection[3]: {}", Common::BitCast<float>(value)));
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case XFMEM_SETPROJECTION + 4:
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return std::make_pair(RegName(XFMEM_SETPROJECTION + 4),
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fmt::format("Projection[4]: {}", Common::BitCast<float>(value)));
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case XFMEM_SETPROJECTION + 5:
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return std::make_pair(RegName(XFMEM_SETPROJECTION + 5),
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fmt::format("Projection[5]: {}", Common::BitCast<float>(value)));
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case XFMEM_SETPROJECTION + 6:
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return std::make_pair(RegName(XFMEM_SETPROJECTION + 6),
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fmt::to_string(static_cast<ProjectionType>(value)));
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case XFMEM_SETNUMTEXGENS:
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return std::make_pair(RegName(XFMEM_SETNUMTEXGENS),
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fmt::format("Number of tex gens: {}", value & 15));
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case XFMEM_SETTEXMTXINFO:
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case XFMEM_SETTEXMTXINFO + 1:
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case XFMEM_SETTEXMTXINFO + 2:
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case XFMEM_SETTEXMTXINFO + 3:
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case XFMEM_SETTEXMTXINFO + 4:
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case XFMEM_SETTEXMTXINFO + 5:
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case XFMEM_SETTEXMTXINFO + 6:
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case XFMEM_SETTEXMTXINFO + 7:
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return std::make_pair(
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fmt::format("XFMEM_SETTEXMTXINFO Matrix {}", address - XFMEM_SETTEXMTXINFO),
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fmt::to_string(TexMtxInfo{.hex = value}));
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case XFMEM_SETPOSTMTXINFO:
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case XFMEM_SETPOSTMTXINFO + 1:
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case XFMEM_SETPOSTMTXINFO + 2:
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case XFMEM_SETPOSTMTXINFO + 3:
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case XFMEM_SETPOSTMTXINFO + 4:
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case XFMEM_SETPOSTMTXINFO + 5:
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case XFMEM_SETPOSTMTXINFO + 6:
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case XFMEM_SETPOSTMTXINFO + 7:
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return std::make_pair(
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fmt::format("XFMEM_SETPOSTMTXINFO Matrix {}", address - XFMEM_SETPOSTMTXINFO),
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fmt::to_string(PostMtxInfo{.hex = value}));
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|
|
|
// --------------
|
|
// Unknown Regs
|
|
// --------------
|
|
|
|
// Maybe these are for Normals?
|
|
case 0x1048: // xfmem.texcoords[0].nrmmtxinfo.hex = data; break; ??
|
|
case 0x1049:
|
|
case 0x104a:
|
|
case 0x104b:
|
|
case 0x104c:
|
|
case 0x104d:
|
|
case 0x104e:
|
|
case 0x104f:
|
|
return std::make_pair(
|
|
fmt::format("Possible Normal Mtx XF reg?: {:x}={:x}", address, value),
|
|
"Maybe these are for Normals? xfmem.texcoords[0].nrmmtxinfo.hex = data; break; ??");
|
|
break;
|
|
|
|
case 0x1013:
|
|
case 0x1014:
|
|
case 0x1015:
|
|
case 0x1016:
|
|
case 0x1017:
|
|
|
|
default:
|
|
return std::make_pair(fmt::format("Unknown XF Reg: {:x}={:x}", address, value), "");
|
|
}
|
|
#undef RegName
|
|
#undef DescriptionlessReg
|
|
}
|
|
|
|
std::string GetXFMemName(u32 address)
|
|
{
|
|
if (address >= XFMEM_POSMATRICES && address < XFMEM_POSMATRICES_END)
|
|
{
|
|
const u32 row = (address - XFMEM_POSMATRICES) / 4;
|
|
const u32 col = (address - XFMEM_POSMATRICES) % 4;
|
|
return fmt::format("Position matrix row {:2d} col {:2d}", row, col);
|
|
}
|
|
else if (address >= XFMEM_NORMALMATRICES && address < XFMEM_NORMALMATRICES_END)
|
|
{
|
|
const u32 row = (address - XFMEM_NORMALMATRICES) / 3;
|
|
const u32 col = (address - XFMEM_NORMALMATRICES) % 3;
|
|
return fmt::format("Normal matrix row {:2d} col {:2d}", row, col);
|
|
}
|
|
else if (address >= XFMEM_POSTMATRICES && address < XFMEM_POSTMATRICES_END)
|
|
{
|
|
const u32 row = (address - XFMEM_POSMATRICES) / 4;
|
|
const u32 col = (address - XFMEM_POSMATRICES) % 4;
|
|
return fmt::format("Post matrix row {:2d} col {:2d}", row, col);
|
|
}
|
|
else if (address >= XFMEM_LIGHTS && address < XFMEM_LIGHTS_END)
|
|
{
|
|
const u32 light = (address - XFMEM_LIGHTS) / 16;
|
|
const u32 offset = (address - XFMEM_LIGHTS) % 16;
|
|
switch (offset)
|
|
{
|
|
default:
|
|
return fmt::format("Light {} unused param {}", light, offset);
|
|
case 3:
|
|
return fmt::format("Light {} color", light);
|
|
case 4:
|
|
case 5:
|
|
case 6:
|
|
return fmt::format("Light {} cosine attenuation {}", light, offset - 4);
|
|
case 7:
|
|
case 8:
|
|
case 9:
|
|
return fmt::format("Light {} distance attenuation {}", light, offset - 7);
|
|
case 10:
|
|
case 11:
|
|
case 12:
|
|
// Yagcd says light pos or "inf ldir", while dolphin has a union for dpos and sdir with only
|
|
// dpos being used nowadays. As far as I can tell only the DX9 engine once at
|
|
// Source/Plugins/Plugin_VideoDX9/Src/TransformEngine.cpp used sdir directly...
|
|
return fmt::format("Light {0} {1} position or inf ldir {1}", light, "xyz"[offset - 10]);
|
|
case 13:
|
|
case 14:
|
|
case 15:
|
|
// Yagcd says light dir or "1/2 angle", dolphin has union for ddir or shalfangle.
|
|
// It would make sense if d stood for direction and s for specular, but it's ddir and
|
|
// shalfhangle that have the comment "specular lights only", both at the same offset,
|
|
// while dpos and sdir have none...
|
|
return fmt::format("Light {0} {1} direction or half hangle {1}", light, "xyz"[offset - 13]);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
return fmt::format("Unknown memory {:04x}", address);
|
|
}
|
|
}
|
|
|
|
std::string GetXFMemDescription(u32 address, u32 value)
|
|
{
|
|
if ((address >= XFMEM_POSMATRICES && address < XFMEM_POSMATRICES_END) ||
|
|
(address >= XFMEM_NORMALMATRICES && address < XFMEM_NORMALMATRICES_END) ||
|
|
(address >= XFMEM_POSTMATRICES && address < XFMEM_POSTMATRICES_END))
|
|
{
|
|
// The matrices all use floats
|
|
return fmt::format("{} = {}", GetXFMemName(address), Common::BitCast<float>(value));
|
|
}
|
|
else if (address >= XFMEM_LIGHTS && address < XFMEM_LIGHTS_END)
|
|
{
|
|
// Each light is 16 words; for this function we don't care which light it is
|
|
const u32 offset = (address - XFMEM_LIGHTS) % 16;
|
|
if (offset <= 3)
|
|
{
|
|
// The unused parameters (0, 1, 2) and the color (3) should be hex-formatted
|
|
return fmt::format("{} = {:08x}", GetXFMemName(address), value);
|
|
}
|
|
else
|
|
{
|
|
// Everything else is a float
|
|
return fmt::format("{} = {}", GetXFMemName(address), Common::BitCast<float>(value));
|
|
}
|
|
}
|
|
else
|
|
{
|
|
// Unknown address
|
|
return fmt::format("{} = {:08x}", GetXFMemName(address), value);
|
|
}
|
|
}
|
|
|
|
std::pair<std::string, std::string> GetXFTransferInfo(const u8* data)
|
|
{
|
|
const u32 cmd = Common::swap32(data);
|
|
data += 4;
|
|
u32 base_address = cmd & 0xFFFF;
|
|
const u32 transfer_size = ((cmd >> 16) & 15) + 1;
|
|
|
|
if (base_address > XFMEM_REGISTERS_END)
|
|
{
|
|
return std::make_pair("Invalid XF Transfer", "Base address past end of address space");
|
|
}
|
|
else if (transfer_size == 1 && base_address >= XFMEM_REGISTERS_START)
|
|
{
|
|
// Write directly to a single register
|
|
const u32 value = Common::swap32(data);
|
|
return GetXFRegInfo(base_address, value);
|
|
}
|
|
|
|
// More complicated cases
|
|
fmt::memory_buffer name, desc;
|
|
u32 end_address = base_address + transfer_size; // exclusive
|
|
|
|
// do not allow writes past registers
|
|
if (end_address > XFMEM_REGISTERS_END)
|
|
{
|
|
fmt::format_to(name, "Invalid XF Transfer ");
|
|
fmt::format_to(desc, "Transfer ends past end of address space\n\n");
|
|
end_address = XFMEM_REGISTERS_END;
|
|
}
|
|
|
|
// write to XF mem
|
|
if (base_address < XFMEM_REGISTERS_START)
|
|
{
|
|
const u32 xf_mem_base = base_address;
|
|
u32 xf_mem_transfer_size = transfer_size;
|
|
|
|
if (end_address > XFMEM_REGISTERS_START)
|
|
{
|
|
xf_mem_transfer_size = XFMEM_REGISTERS_START - base_address;
|
|
base_address = XFMEM_REGISTERS_START;
|
|
}
|
|
|
|
fmt::format_to(name, "Write {} XF mem words at {:04x}", xf_mem_transfer_size, xf_mem_base);
|
|
|
|
for (u32 i = 0; i < xf_mem_transfer_size; i++)
|
|
{
|
|
const auto mem_desc = GetXFMemDescription(xf_mem_base + i, Common::swap32(data));
|
|
fmt::format_to(desc, i == 0 ? "{}" : "\n{}", mem_desc);
|
|
data += 4;
|
|
}
|
|
|
|
if (end_address > XFMEM_REGISTERS_START)
|
|
fmt::format_to(name, "; ");
|
|
}
|
|
|
|
// write to XF regs
|
|
if (base_address >= XFMEM_REGISTERS_START)
|
|
{
|
|
fmt::format_to(name, "Write {} XF regs at {:04x}", end_address - base_address, base_address);
|
|
|
|
for (u32 address = base_address; address < end_address; address++)
|
|
{
|
|
const u32 value = Common::swap32(data);
|
|
|
|
const auto [regname, regdesc] = GetXFRegInfo(address, value);
|
|
fmt::format_to(desc, "{}\n{}\n", regname, regdesc);
|
|
|
|
data += 4;
|
|
}
|
|
}
|
|
|
|
return std::make_pair(fmt::to_string(name), fmt::to_string(desc));
|
|
}
|