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775dc8a9c0
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4 8ced0084-cf51-0410-be5f-012b33b47a6e
351 lines
7.9 KiB
C++
351 lines
7.9 KiB
C++
/*====================================================================
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filename: gdsp_interface.h
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project: GCemu
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created: 2004-6-18
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mail: duddie@walla.com
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Copyright (c) 2005 Duddie & Tratax
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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====================================================================*/
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#include <stdlib.h>
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#include "Globals.h"
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#include "gdsp_aram.h"
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#include "gdsp_interpreter.h"
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#include "gdsp_interface.h"
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#include "Tools.h"
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#ifndef NULL
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#define NULL 0
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#endif
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#ifndef _WIN32
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#undef WITH_DSP_ON_THREAD
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//TODO FIX
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#endif
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const char* reg_names[] =
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{
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// a0
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"COEF_A1_0", "COEF_A2_0", "COEF_A1_1", "COEF_A2_1", "COEF_A1_2", "COEF_A2_2", "COEF_A1_3", "COEF_A2_3",
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"COEF_A1_4", "COEF_A2_4", "COEF_A1_5", "COEF_A2_5", "COEF_A1_6", "COEF_A2_6", "COEF_A1_7", "COEF_A2_7",
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// b0
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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// c0
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, "DSCR", NULL, "DSBL", NULL, "DSPA", "DSMAH", "DSMAL",
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// d0
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NULL, "SampleFormat", NULL, NULL, "ACSAH", "ACSAL", "ACEAH", "ACEAL",
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"ACCAH", "ACCAL", "PRED_SCALE", "YN1", "YN2", "ARAM", "GAIN", NULL,
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// e0
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, "AMDM",
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// f0
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, "DMBH", "DMBL", "CMBH", "CMBL",
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};
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void gdsp_dma();
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#ifdef _WIN32
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extern CRITICAL_SECTION g_CriticalSection;
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#endif
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static volatile uint16 gdsp_mbox[2][2];
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uint16 gdsp_ifx_regs[256];
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void gdsp_ifx_init()
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{
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int i;
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for (i = 0; i < 256; i++)
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{
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gdsp_ifx_regs[i] = 0;
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}
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gdsp_mbox[0][0] = 0;
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gdsp_mbox[0][1] = 0;
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gdsp_mbox[1][0] = 0;
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gdsp_mbox[1][1] = 0;
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}
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uint32 gdsp_mbox_peek(uint8 mbx)
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{
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return((gdsp_mbox[mbx][0] << 16) | gdsp_mbox[mbx][1]);
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}
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void gdsp_mbox_write_h(uint8 mbx, uint16 val)
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{
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#if WITH_DSP_ON_THREAD
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EnterCriticalSection(&g_CriticalSection);
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#endif
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gdsp_mbox[mbx][0] = val & 0x7fff;
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#if WITH_DSP_ON_THREAD
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LeaveCriticalSection(&g_CriticalSection);
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#endif
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}
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void gdsp_mbox_write_l(uint8 mbx, uint16 val)
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{
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#if WITH_DSP_ON_THREAD
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EnterCriticalSection(&g_CriticalSection);
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#endif
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gdsp_mbox[mbx][1] = val;
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gdsp_mbox[mbx][0] |= 0x8000;
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#if WITH_DSP_ON_THREAD
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LeaveCriticalSection(&g_CriticalSection);
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#endif
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if (mbx == GDSP_MBOX_DSP)
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{
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DebugLog("- Write DSP Mail: 0x%08x (pc=0x%04x)\n", gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.err_pc);
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}
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}
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uint16 gdsp_mbox_read_h(uint8 mbx)
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{
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return(gdsp_mbox[mbx][0]);
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}
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uint16 gdsp_mbox_read_l(uint8 mbx)
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{
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uint16 val;
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#if WITH_DSP_ON_THREAD
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EnterCriticalSection(&g_CriticalSection);
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#endif
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val = gdsp_mbox[mbx][1];
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gdsp_mbox[mbx][0] &= ~0x8000;
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#if WITH_DSP_ON_THREAD
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LeaveCriticalSection(&g_CriticalSection);
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#endif
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return(val);
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}
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void gdsp_ifx_write(uint16 addr, uint16 val)
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{
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addr &= 0xff;
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switch (addr & 0xff)
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{
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case 0xfb: // DIRQ
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if (val & 0x1)
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{
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g_dsp.irq_request();
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}
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break;
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case 0xfc: // DMBH
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gdsp_mbox_write_h(GDSP_MBOX_DSP, val);
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break;
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case 0xfd: // DMBL
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gdsp_mbox_write_l(GDSP_MBOX_DSP, val);
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break;
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case 0xcb: // DSBL
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gdsp_ifx_regs[addr] = val;
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gdsp_dma();
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gdsp_ifx_regs[DSP_DSCR] &= ~0x0004;
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break;
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case 0xcd:
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case 0xce:
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case 0xcf:
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case 0xc9:
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gdsp_ifx_regs[addr] = val;
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break;
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default:
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/* if ((addr & 0xff) >= 0xa0 && reg_names[addr - 0xa0])
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DebugLog("%04x MW %s (%04x)\n", g_dsp.pc, reg_names[addr - 0xa0], val);
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else
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DebugLog("%04x MW %04x (%04x)\n", g_dsp.pc, addr, val);*/
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gdsp_ifx_regs[addr] = val;
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break;
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}
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}
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uint16 gdsp_ifx_read(uint16 addr)
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{
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uint16 val;
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addr &= 0xff;
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switch (addr & 0xff)
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{
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case 0xfc: // DMBH
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val = gdsp_mbox_read_h(GDSP_MBOX_DSP);
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break;
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case 0xfe: // CMBH
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val = gdsp_mbox_read_h(GDSP_MBOX_CPU);
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break;
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case 0xff: // CMBL
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val = gdsp_mbox_read_l(GDSP_MBOX_CPU);
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break;
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case 0xc9:
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val = gdsp_ifx_regs[addr];
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break;
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case 0xdd:
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val = dsp_read_aram();
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break;
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default:
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val = gdsp_ifx_regs[addr];
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/* if ((addr & 0xff) >= 0xc0 && reg_names[addr & 0x3f])
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printf("%04x MR %s (%04x)\n", g_dsp.pc, reg_names[addr & 0x3f], val);
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else
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printf("%04x MR %04x (%04x)\n", g_dsp.pc, addr, val);*/
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break;
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}
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return(val);
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}
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void gdsp_idma_in(uint16 dsp_addr, uint32 addr, uint32 size)
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{
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#if DUMP_DSP_IMEM
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DumpDSPCode(addr, size);
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#endif
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uint8* dst = ((uint8*)g_dsp.iram);
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for (uint32 i = 0; i < size; i += 2)
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{
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*(uint16*)&dst[dsp_addr + i] = *(uint16*)&g_dsp.cpu_ram[(addr + i) & 0x0fffffff];
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}
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g_dsp.iram_crc = GenerateCRC(g_dsp.cpu_ram + (addr & 0x0fffffff), size);
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DebugLog("*** Copy new UCode from 0x%08x to 0x%04x (crc: %8x)\n", addr, dsp_addr, g_dsp.iram_crc);
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}
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void gdsp_idma_out(uint16 dsp_addr, uint32 addr, uint32 size)
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{
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ErrorLog("*** idma_out IRAM_DSP (0x%04x) -> RAM (0x%08x) : size (0x%08x)\n", dsp_addr / 2, addr, size);
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}
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void gdsp_ddma_in(uint16 dsp_addr, uint32 addr, uint32 size)
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{
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if ((addr & 0x7FFFFFFF) > 0x01FFFFFF)
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{
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ErrorLog("*** ddma_in read from invalid addr (0x%08x)\n", addr);
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return;
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}
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uint8* dst = ((uint8*)g_dsp.dram);
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for (uint32 i = 0; i < size; i += 2)
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{
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*(uint16*)&dst[dsp_addr + i] = *(uint16*)&g_dsp.cpu_ram[(addr + i) & 0x7FFFFFFF];
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}
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DebugLog("*** ddma_in RAM (0x%08x) -> DRAM_DSP (0x%04x) : size (0x%08x)\n", addr, dsp_addr / 2, size);
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}
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void gdsp_ddma_out(uint16 dsp_addr, uint32 addr, uint32 size)
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{
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if ((addr & 0x7FFFFFFF) > 0x01FFFFFF)
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{
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ErrorLog("*** gdsp_ddma_out to invalid addr (0x%08x)\n", addr);
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return;
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}
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uint8* src = ((uint8*)g_dsp.dram);
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for (uint32 i = 0; i < size; i += 2)
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{
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*(uint16*)&g_dsp.cpu_ram[(addr + i) & 0x7FFFFFFF] = *(uint16*)&src[dsp_addr + i];
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}
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DebugLog("*** ddma_out DRAM_DSP (0x%04x) -> RAM (0x%08x) : size (0x%08x)\n", dsp_addr / 2, addr, size);
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}
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#define DSP_CR_IMEM (2)
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#define DSP_CR_DMEM (0)
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#define DSP_CR_TO_CPU (1)
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#define DSP_CR_FROM_CPU (0)
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void gdsp_dma()
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{
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uint16 ctl;
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uint32 addr;
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uint16 dsp_addr;
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uint16 len;
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addr = (gdsp_ifx_regs[DSP_DSMAH] << 16) | gdsp_ifx_regs[DSP_DSMAL];
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ctl = gdsp_ifx_regs[DSP_DSCR];
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dsp_addr = gdsp_ifx_regs[DSP_DSPA] * 2;
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len = gdsp_ifx_regs[DSP_DSBL];
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if ((ctl > 3) || (len > 0x4000))
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{
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ErrorLog("DMA ERROR pc: %04x ctl: %04x addr: %08x da: %04x size: %04x\n", g_dsp.pc, ctl, addr, dsp_addr, len);
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exit(0);
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}
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switch (ctl & 0x3)
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{
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case (DSP_CR_DMEM | DSP_CR_TO_CPU):
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gdsp_ddma_out(dsp_addr, addr, len);
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break;
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case (DSP_CR_DMEM | DSP_CR_FROM_CPU):
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gdsp_ddma_in(dsp_addr, addr, len);
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break;
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case (DSP_CR_IMEM | DSP_CR_TO_CPU):
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gdsp_idma_out(dsp_addr, addr, len);
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break;
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case (DSP_CR_IMEM | DSP_CR_FROM_CPU):
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gdsp_idma_in(dsp_addr, addr, len);
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break;
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}
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}
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