mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2024-11-15 05:47:56 -07:00
98752f2a1e
functions accidentally added. Fixed the jitted ar register arithmetic. Added a CMakeList.txt for the UnitTests, but did not add the subdirectory to Source/CMakeLists.txt. git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6687 8ced0084-cf51-0410-be5f-012b33b47a6e
311 lines
7.6 KiB
C++
311 lines
7.6 KiB
C++
#include "DSPJitTester.h"
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DSPJitTester::DSPJitTester(u16 opcode, u16 opcode_ext, bool verbose, bool only_failed)
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: be_verbose(verbose), failed_only(only_failed), run_count(0), fail_count(0)
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{
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instruction = opcode | opcode_ext;
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opcode_template = GetOpTemplate(instruction);
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sprintf(instruction_name, "%s", opcode_template->name);
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if (opcode_template->extended)
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sprintf(&instruction_name[strlen(instruction_name)], "'%s",
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extOpTable[instruction & (((instruction >> 12) == 0x3) ? 0x7F : 0xFF)]->name);
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}
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bool DSPJitTester::Test(SDSP dsp_settings)
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{
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if (be_verbose && !failed_only)
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{
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printf("Running %s: ", instruction_name);
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DumpRegs(dsp_settings);
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}
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last_input_dsp = dsp_settings;
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last_int_dsp = RunInterpreter(dsp_settings);
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last_jit_dsp = RunJit(dsp_settings);
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run_count++;
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bool success = AreEqual(last_int_dsp, last_jit_dsp);
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if (!success)
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fail_count++;
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return success;
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}
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SDSP DSPJitTester::RunInterpreter(SDSP dsp_settings)
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{
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ResetInterpreter();
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memcpy(&g_dsp, &dsp_settings, sizeof(SDSP));
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ExecuteInstruction(instruction);
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return g_dsp;
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}
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SDSP DSPJitTester::RunJit(SDSP dsp_settings)
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{
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ResetJit();
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memcpy(&g_dsp, &dsp_settings, sizeof(SDSP));
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const u8* code = jit.GetCodePtr();
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jit.ABI_PushAllCalleeSavedRegsAndAdjustStack();
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jit.EmitInstruction(instruction);
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jit.ABI_PopAllCalleeSavedRegsAndAdjustStack();
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jit.RET();
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((void(*)())code)();
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return g_dsp;
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}
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void DSPJitTester::ResetInterpreter()
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{
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for (int i=0; i < WRITEBACKLOGSIZE; i++)
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writeBackLogIdx[i] = -1;
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}
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void DSPJitTester::ResetJit()
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{
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jit.ClearCodeSpace();
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}
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static u16 GetRegister(SDSP const &dsp, int reg) {
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switch(reg) {
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case DSP_REG_AR0:
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case DSP_REG_AR1:
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case DSP_REG_AR2:
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case DSP_REG_AR3:
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return dsp.r.ar[reg - DSP_REG_AR0];
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case DSP_REG_IX0:
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case DSP_REG_IX1:
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case DSP_REG_IX2:
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case DSP_REG_IX3:
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return dsp.r.ix[reg - DSP_REG_IX0];
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case DSP_REG_WR0:
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case DSP_REG_WR1:
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case DSP_REG_WR2:
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case DSP_REG_WR3:
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return dsp.r.wr[reg - DSP_REG_WR0];
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case DSP_REG_ST0:
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case DSP_REG_ST1:
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case DSP_REG_ST2:
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case DSP_REG_ST3:
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return dsp.r.st[reg - DSP_REG_ST0];
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case DSP_REG_ACH0:
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case DSP_REG_ACH1:
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return dsp.r.ac[reg - DSP_REG_ACH0].h;
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case DSP_REG_CR: return dsp.r.cr;
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case DSP_REG_SR: return dsp.r.sr;
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case DSP_REG_PRODL: return dsp.r.prod.l;
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case DSP_REG_PRODM: return dsp.r.prod.m;
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case DSP_REG_PRODH: return dsp.r.prod.h;
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case DSP_REG_PRODM2: return dsp.r.prod.m2;
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case DSP_REG_AXL0:
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case DSP_REG_AXL1:
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return dsp.r.ax[reg - DSP_REG_AXL0].l;
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case DSP_REG_AXH0:
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case DSP_REG_AXH1:
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return dsp.r.ax[reg - DSP_REG_AXH0].h;
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case DSP_REG_ACL0:
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case DSP_REG_ACL1:
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return dsp.r.ac[reg - DSP_REG_ACL0].l;
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case DSP_REG_ACM0:
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case DSP_REG_ACM1:
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return dsp.r.ac[reg - DSP_REG_ACM0].m;
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default:
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_assert_msg_(DSP_CORE, 0, "cannot happen");
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return 0;
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}
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}
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static void SetRegister(SDSP &dsp, int reg, u16 val) {
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switch(reg) {
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case DSP_REG_AR0:
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case DSP_REG_AR1:
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case DSP_REG_AR2:
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case DSP_REG_AR3:
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dsp.r.ar[reg - DSP_REG_AR0] = val; break;
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case DSP_REG_IX0:
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case DSP_REG_IX1:
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case DSP_REG_IX2:
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case DSP_REG_IX3:
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dsp.r.ix[reg - DSP_REG_IX0] = val; break;
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case DSP_REG_WR0:
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case DSP_REG_WR1:
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case DSP_REG_WR2:
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case DSP_REG_WR3:
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dsp.r.wr[reg - DSP_REG_WR0] = val; break;
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case DSP_REG_ST0:
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case DSP_REG_ST1:
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case DSP_REG_ST2:
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case DSP_REG_ST3:
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dsp.r.st[reg - DSP_REG_ST0] = val; break;
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case DSP_REG_ACH0:
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case DSP_REG_ACH1:
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dsp.r.ac[reg - DSP_REG_ACH0].h = val; break;
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case DSP_REG_CR: dsp.r.cr = val; break;
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case DSP_REG_SR: dsp.r.sr = val; break;
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case DSP_REG_PRODL: dsp.r.prod.l = val; break;
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case DSP_REG_PRODM: dsp.r.prod.m = val; break;
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case DSP_REG_PRODH: dsp.r.prod.h = val; break;
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case DSP_REG_PRODM2: dsp.r.prod.m2 = val; break;
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case DSP_REG_AXL0:
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case DSP_REG_AXL1:
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dsp.r.ax[reg - DSP_REG_AXL0].l = val; break;
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case DSP_REG_AXH0:
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case DSP_REG_AXH1:
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dsp.r.ax[reg - DSP_REG_AXH0].h = val; break;
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case DSP_REG_ACL0:
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case DSP_REG_ACL1:
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dsp.r.ac[reg - DSP_REG_ACL0].l = val; break;
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case DSP_REG_ACM0:
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case DSP_REG_ACM1:
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dsp.r.ac[reg - DSP_REG_ACM0].m = val; break;
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default:
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_assert_msg_(DSP_CORE, 0, "cannot happen");
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}
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}
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bool DSPJitTester::AreEqual(SDSP& int_dsp, SDSP& jit_dsp)
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{
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bool equal = true;
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for (int i = 0; i < DSP_REG_NUM; i++)
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{
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if (GetRegister(int_dsp,i) != GetRegister(jit_dsp, i))
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{
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if (equal)
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{
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if (failed_only)
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{
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printf("%s ", instruction_name);
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DumpRegs(last_input_dsp);
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}
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if (be_verbose || failed_only)
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printf("failed\n");
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}
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equal = false;
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if (be_verbose || failed_only)
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printf("\t%s: int = 0x%04x, jit = 0x%04x\n", regnames[i].name, GetRegister(int_dsp,i), GetRegister(jit_dsp, i));
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}
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}
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//TODO: more sophisticated checks?
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if (!int_dsp.iram || !jit_dsp.iram)
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{
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if (be_verbose)
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printf("(IRAM null)");
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}
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else if (memcmp(int_dsp.iram, jit_dsp.iram, DSP_IRAM_BYTE_SIZE))
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{
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printf("\tIRAM: different\n");
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equal = false;
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}
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if (!int_dsp.dram || !jit_dsp.dram)
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{
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if (be_verbose)
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printf("(DRAM null)");
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}
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else if (memcmp(int_dsp.dram, jit_dsp.dram, DSP_DRAM_BYTE_SIZE))
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{
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printf("\tDRAM: different\n");
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equal = false;
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}
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if (equal && be_verbose && !failed_only)
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printf("passed\n");
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return equal;
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}
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void DSPJitTester::Report()
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{
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printf("%s (0x%04x): Ran %d times, Failed %d times.\n", instruction_name, instruction, run_count, fail_count);
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}
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void DSPJitTester::DumpJittedCode()
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{
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ResetJit();
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const u8* code = jit.GetCodePtr();
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jit.EmitInstruction(instruction);
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size_t code_size = jit.GetCodePtr() - code;
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printf("%s emitted: ", instruction_name);
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for (size_t i = 0; i < code_size; i++)
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printf("%02x ", code[i]);
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printf("\n");
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}
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void DSPJitTester::DumpRegs(SDSP& dsp)
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{
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for (int i = 0; i < DSP_REG_NUM; i++)
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if (GetRegister(dsp,i))
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printf("%s=0x%04x ", regnames[i].name, GetRegister(dsp,i));
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}
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void DSPJitTester::Initialize()
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{
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//init int
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InitInstructionTable();
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}
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int DSPJitTester::TestOne(TestDataIterator it, SDSP& dsp)
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{
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int failed = 0;
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if (it != test_values.end())
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{
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u8 reg = it->first;
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TestData& data = it->second;
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it++;
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for (TestData::size_type i = 0; i < data.size(); i++)
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{
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SetRegister(dsp, reg, data.at(i));
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failed += TestOne(it, dsp);
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}
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}
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else
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{
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if (!Test(dsp))
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failed++;
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}
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return failed;
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}
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int DSPJitTester::TestAll(bool verbose_fail)
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{
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int failed = 0;
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SDSP dsp;
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memset(&dsp, 0, sizeof(SDSP));
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//from DSPCore_Init
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dsp.irom = (u16*)AllocateMemoryPages(DSP_IROM_BYTE_SIZE);
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dsp.iram = (u16*)AllocateMemoryPages(DSP_IRAM_BYTE_SIZE);
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dsp.dram = (u16*)AllocateMemoryPages(DSP_DRAM_BYTE_SIZE);
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dsp.coef = (u16*)AllocateMemoryPages(DSP_COEF_BYTE_SIZE);
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// Fill roms with distinct patterns.
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for (int i = 0; i < DSP_IROM_SIZE; i++)
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dsp.irom[i] = (i & 0x3fff) | 0x4000;
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for (int i = 0; i < DSP_COEF_SIZE; i++)
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dsp.coef[i] = (i & 0x3fff) | 0x8000;
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for (int i = 0; i < DSP_DRAM_SIZE; i++)
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dsp.dram[i] = (i & 0x3fff) | 0xc000;
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// Fill IRAM with HALT opcodes.
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for (int i = 0; i < DSP_IRAM_SIZE; i++)
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dsp.iram[i] = 0x0021; // HALT opcode
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bool verbose = failed_only;
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failed_only = verbose_fail;
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failed += TestOne(test_values.begin(), dsp);
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failed_only = verbose;
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FreeMemoryPages(dsp.irom, DSP_IROM_BYTE_SIZE);
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FreeMemoryPages(dsp.iram, DSP_IRAM_BYTE_SIZE);
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FreeMemoryPages(dsp.dram, DSP_DRAM_BYTE_SIZE);
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FreeMemoryPages(dsp.coef, DSP_COEF_BYTE_SIZE);
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return failed;
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}
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void DSPJitTester::AddTestData(u8 reg)
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{
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AddTestData(reg, 0);
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AddTestData(reg, 1);
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AddTestData(reg, 0x1fff);
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AddTestData(reg, 0x2000);
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AddTestData(reg, 0x2001);
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AddTestData(reg, 0x7fff);
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AddTestData(reg, 0x8000);
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AddTestData(reg, 0x8001);
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AddTestData(reg, 0xfffe);
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AddTestData(reg, 0xffff);
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}
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void DSPJitTester::AddTestData(u8 reg, u16 value)
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{
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if (reg < DSP_REG_NUM)
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test_values[reg].push_back(value);
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}
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