mirror of
https://github.com/dolphin-emu/dolphin.git
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c2ed29fe0d
Small TLB lookup optimizations: this is the hot path for MMU code, so try to make it better. Template the TLB lookup functions based on the lookup type (opcode, data, no exception). Clean up the Read/Write functions and make them more consistent. Add an early-exit path for MMU accesses to ReadFromHardware/WriteToHardware.
150 lines
4.4 KiB
C++
150 lines
4.4 KiB
C++
// Copyright 2014 Dolphin Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#pragma once
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#include <string>
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#include "Common/CommonFuncs.h"
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#include "Common/CommonTypes.h"
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// Enable memory checks in the Debug/DebugFast builds, but NOT in release
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#if defined(_DEBUG) || defined(DEBUGFAST)
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#define ENABLE_MEM_CHECK
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#endif
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// Global declarations
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class PointerWrap;
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namespace MMIO { class Mapping; }
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namespace Memory
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{
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// Base is a pointer to the base of the memory map. Yes, some MMU tricks
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// are used to set up a full GC or Wii memory map in process memory. on
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// 32-bit, you have to mask your offsets with 0x3FFFFFFF. This means that
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// some things are mirrored too many times, but eh... it works.
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// In 64-bit, this might point to "high memory" (above the 32-bit limit),
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// so be sure to load it into a 64-bit register.
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extern u8* base;
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// These are guaranteed to point to "low memory" addresses (sub-32-bit).
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extern u8* m_pRAM;
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extern u8* m_pEXRAM;
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extern u8* m_pL1Cache;
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extern u8* m_pFakeVMEM;
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extern bool bFakeVMEM;
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enum
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{
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// RAM_SIZE is the amount allocated by the emulator, whereas REALRAM_SIZE is
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// what will be reported in lowmem, and thus used by emulated software.
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// Note: Writing to lowmem is done by IPL. If using retail IPL, it will
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// always be set to 24MB.
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REALRAM_SIZE = 0x01800000,
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RAM_SIZE = ROUND_UP_POW2(REALRAM_SIZE),
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RAM_MASK = RAM_SIZE - 1,
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FAKEVMEM_SIZE = 0x02000000,
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FAKEVMEM_MASK = FAKEVMEM_SIZE - 1,
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L1_CACHE_SIZE = 0x00040000,
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L1_CACHE_MASK = L1_CACHE_SIZE - 1,
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IO_SIZE = 0x00010000,
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EXRAM_SIZE = 0x04000000,
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EXRAM_MASK = EXRAM_SIZE - 1,
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ADDR_MASK_HW_ACCESS = 0x0c000000,
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ADDR_MASK_MEM1 = 0x20000000,
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#if _ARCH_32
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MEMVIEW32_MASK = 0x3FFFFFFF,
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#endif
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};
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// MMIO mapping object.
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extern MMIO::Mapping* mmio_mapping;
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// Init and Shutdown
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bool IsInitialized();
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void Init();
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void Shutdown();
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void DoState(PointerWrap &p);
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void Clear();
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bool AreMemoryBreakpointsActivated();
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// ONLY for use by GUI
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u8 ReadUnchecked_U8(const u32 _Address);
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u32 ReadUnchecked_U32(const u32 _Address);
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void WriteUnchecked_U8(const u8 _Data, const u32 _Address);
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void WriteUnchecked_U32(const u32 _Data, const u32 _Address);
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bool IsRAMAddress(const u32 addr, bool allow_locked_cache = false, bool allow_fake_vmem = false);
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// used by interpreter to read instructions, uses iCache
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u32 Read_Opcode(const u32 _Address);
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// this is used by Debugger a lot.
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// For now, just reads from memory!
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u32 Read_Instruction(const u32 _Address);
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// For use by emulator
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u8 Read_U8(const u32 _Address);
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u16 Read_U16(const u32 _Address);
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u32 Read_U32(const u32 _Address);
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u64 Read_U64(const u32 _Address);
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u32 Read_S8_Val(const u32 _Address, u32 _var);
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u32 Read_U8_Val(const u32 _Address, u32 _var);
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u32 Read_S16_Val(const u32 _Address, u32 _var);
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u32 Read_U16_Val(const u32 _Address, u32 _var);
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u32 Read_U32_Val(const u32 _Address, u32 _var);
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u64 Read_U64_Val(const u32 _Address, u64 _var);
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// Useful helper functions, used by ARM JIT
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float Read_F32(const u32 _Address);
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double Read_F64(const u32 _Address);
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// used by JIT. Return zero-extended 32bit values
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u32 Read_U8_ZX(const u32 _Address);
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u32 Read_U16_ZX(const u32 _Address);
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void Write_U8(const u8 _var, const u32 _Address);
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void Write_U16(const u16 _var, const u32 _Address);
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void Write_U32(const u32 _var, const u32 _Address);
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void Write_U64(const u64 _var, const u32 _Address);
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void Write_U16_Swap(const u16 _var, const u32 _Address);
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void Write_U32_Swap(const u32 _var, const u32 _Address);
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void Write_U64_Swap(const u64 _var, const u32 _Address);
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// Useful helper functions, used by ARM JIT
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void Write_F64(const double _var, const u32 _Address);
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std::string GetString(u32 em_address, size_t size = 0);
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u8* GetPointer(const u32 _Address);
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void DMA_LCToMemory(const u32 _iMemAddr, const u32 _iCacheAddr, const u32 _iNumBlocks);
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void DMA_MemoryToLC(const u32 _iCacheAddr, const u32 _iMemAddr, const u32 _iNumBlocks);
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void CopyFromEmu(void* data, u32 address, size_t size);
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void CopyToEmu(u32 address, const void* data, size_t size);
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void Memset(const u32 _Address, const u8 _Data, const u32 _iLength);
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void ClearCacheLine(const u32 _Address); // Zeroes 32 bytes; address should be 32-byte-aligned
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// TLB functions
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void SDRUpdated();
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enum XCheckTLBFlag
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{
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FLAG_NO_EXCEPTION,
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FLAG_READ,
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FLAG_WRITE,
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FLAG_OPCODE,
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};
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template <const XCheckTLBFlag _Flag> u32 TranslateAddress(const u32 _Address);
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void InvalidateTLBEntry(u32 _Address);
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extern u32 pagetable_base;
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extern u32 pagetable_hashmask;
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}
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