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Instruction and memory timing passing.

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This commit is contained in:
Samuel Walker
2025-05-30 21:04:47 -06:00
parent 5f957fac84
commit 09775258aa
3 changed files with 47 additions and 10 deletions
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3
.vscode/settings.json vendored
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@ -9,6 +9,7 @@
"type_traits": "c",
"xtr1common": "c",
"chrono": "c",
"interrupts.h": "c"
"interrupts.h": "c",
"cmath": "c"
}
}

2
include/cpu.h
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@ -78,3 +78,5 @@ u8 cpu_get_int_flags();
void cpu_set_int_flags(u8 value);
void inst_to_str(cpu_context *ctx, char *str);
void cpu_set_flags(cpu_context *ctx, int8_t z, int8_t n, int8_t h, int8_t c);

50
lib/cpu_proc.c
View File

@ -30,7 +30,7 @@ static bool is_16_bit(reg_type rt){
static void proc_none(cpu_context *ctx) {
printf("INVALID INSTRUCTION!\n");
exit(-7);
//exit(-7);
}
static void proc_nop(cpu_context *ctx) {
@ -119,10 +119,10 @@ static void proc_cb(cpu_context *ctx) {
u8 bit = (op >> 3) & 0b111;
u8 bit_op = (op >> 6) & 0b11;
u8 reg_val = cpu_read_reg8(reg);
emu_cycles(1);
//emu_cycles(1);
if(reg == RT_HL) {
//emu_cycles(2);
emu_cycles(1);
}
switch(bit_op) {
@ -135,12 +135,18 @@ static void proc_cb(cpu_context *ctx) {
//RST
reg_val &= ~(1 << bit);
cpu_set_reg8(reg, reg_val);
if(reg == RT_HL) {
emu_cycles(1);
}
return;
case 3:
//set
reg_val |= (1 << bit);
cpu_set_reg8(reg, reg_val);
if(reg == RT_HL) {
emu_cycles(1);
}
return;
default: break;
}
@ -159,6 +165,9 @@ static void proc_cb(cpu_context *ctx) {
}
cpu_set_reg8(reg, result);
if(reg == RT_HL) {
emu_cycles(1);
}
cpu_set_flags(ctx, result == 0, 0, 0, setC);
} return;
@ -169,6 +178,9 @@ static void proc_cb(cpu_context *ctx) {
reg_val |= (old << 7);
cpu_set_reg8(reg, reg_val);
if(reg == RT_HL) {
emu_cycles(1);
}
cpu_set_flags(ctx, !reg_val, 0, 0, old & 1);
} return;
@ -179,6 +191,9 @@ static void proc_cb(cpu_context *ctx) {
reg_val |= flagC;
cpu_set_reg8(reg, reg_val);
if(reg == RT_HL) {
emu_cycles(1);
}
cpu_set_flags(ctx, !reg_val, 0, 0, !!(old & 0x80));
} return;
@ -189,6 +204,9 @@ static void proc_cb(cpu_context *ctx) {
reg_val |= (flagC << 7);
cpu_set_reg8(reg, reg_val);
if(reg == RT_HL) {
emu_cycles(1);
}
cpu_set_flags(ctx, !reg_val, 0, 0, old & 1);
} return;
@ -198,6 +216,9 @@ static void proc_cb(cpu_context *ctx) {
reg_val <<= 1;
cpu_set_reg8(reg, reg_val);
if(reg == RT_HL) {
emu_cycles(1);
}
cpu_set_flags(ctx, !reg_val, 0, 0, old & 0x80);
} return;
@ -205,6 +226,9 @@ static void proc_cb(cpu_context *ctx) {
//SRA
u8 u = (int8_t)reg_val >> 1;
cpu_set_reg8(reg, u);
if(reg == RT_HL) {
emu_cycles(1);
}
cpu_set_flags(ctx, !u, 0, 0, reg_val & 1);
} return;
@ -212,6 +236,9 @@ static void proc_cb(cpu_context *ctx) {
//SWAP
reg_val = ((reg_val & 0xF0) >> 4) | ((reg_val & 0xF) << 4);
cpu_set_reg8(reg, reg_val);
if(reg == RT_HL) {
emu_cycles(1);
}
cpu_set_flags(ctx, reg_val == 0, 0, 0, 0);
} return;
@ -219,6 +246,9 @@ static void proc_cb(cpu_context *ctx) {
//SRL
u8 u = reg_val >> 1;
cpu_set_reg8(reg, u);
if(reg == RT_HL) {
emu_cycles(1);
}
cpu_set_flags(ctx, !u, 0, 0, reg_val & 1);
} return;
}
@ -339,10 +369,6 @@ static void proc_add(cpu_context *ctx) {
static void proc_inc(cpu_context *ctx) {
u16 val = cpu_read_reg(ctx->cur_inst->reg_1) + 1;
if(is_16_bit(ctx->cur_inst->reg_1)) {
//emu_cycles(1);
}
if (ctx->cur_inst->reg_1 == RT_HL && ctx->dest_is_mem) {
val = ctx->fetched_data + 1;
val &= 0xFF;
@ -352,6 +378,10 @@ static void proc_inc(cpu_context *ctx) {
val = cpu_read_reg(ctx->cur_inst->reg_1);
}
if(is_16_bit(ctx->cur_inst->reg_1)) {
emu_cycles(1);
}
if((ctx->cur_opcode & 0x03) == 0x03) {
return;
}
@ -439,9 +469,12 @@ static void proc_ld(cpu_context *ctx) {
u8 cflag = (cpu_read_reg(ctx->cur_inst->reg_2) & 0xFF) + (ctx->fetched_data & 0xFF) >= 0x100;
cpu_set_flags(ctx, 0, 0, hflag, cflag);
cpu_set_reg(ctx->cur_inst->reg_1, cpu_read_reg(ctx->cur_inst->reg_2) + (char)ctx->fetched_data);
emu_cycles(1);
return;
}
cpu_set_reg(ctx->cur_inst->reg_1, ctx->fetched_data);
if(ctx->cur_inst->reg_1 == RT_SP && ctx->cur_inst->reg_2 == RT_HL)
emu_cycles(1);
}
static bool check_condition(cpu_context *ctx) {
@ -461,7 +494,8 @@ static bool check_condition(cpu_context *ctx) {
static void goto_addr(cpu_context *ctx, u16 addr, bool pushpc){
if (check_condition(ctx)) {
emu_cycles(1);
if(ctx->cur_inst->reg_1 != RT_HL)
emu_cycles(1);
if(pushpc) {
stack_push16(ctx->regs.pc);
emu_cycles(2);