xor di and cpu flags

include/common.h

@@ -11,7 +11,7 @@ typedef uint32_t u32;
 typedef uint64_t u64;
 
 #define BIT(a, n) ((a & (1 << n)) ? 1 : 0)
-#define BIT_SET(a, n, on) (on ? (a) |= (1 << n) : (a) &= !(1 << n))
+#define BIT_SET(a, n, on) {if(on) a |= (1 << n); else a &= !(1 << n);}
 #define BETWEEN(a, b, c) ((a >= b) && (a <= c))
 
 void delay(u32 ms);

include/cpu.h

@@ -28,6 +28,8 @@ typedef struct {
 
     bool halted;
     bool stepping;
+
+    bool int_master_enabled;
 } cpu_context;
 
 void cpu_init();
@@ -39,3 +41,5 @@ IN_PROC inst_get_processor(in_type type);
 
 #define CPU_FLAG_Z BIT(ctx->regs.f, 7)
 #define CPU_FLAG_C BIT(ctx->regs.f, 4)
+
+u16 cpu_read_reg(reg_type rt);

include/instructions.h

@@ -2,6 +2,7 @@
 #include <common.h>
 
 typedef enum {
+    AM_IMP,
     AM_R_D16,
     AM_R_R,
     AM_MR_R,
@@ -17,7 +18,6 @@ typedef enum {
     AM_HL_SPR,
     AM_D16,
     AM_D8,
-    AM_IMP,
     AM_D16_R,
     AM_MR_D8,
     AM_MR,

lib/cpu.c

@@ -5,6 +5,7 @@ cpu_context ctx = {0};
 
 void cpu_init() {
     ctx.regs.pc = 0x100;
+    ctx.regs.a = 0x01;
 }
 
 static void fetch_instruction() {
@@ -38,7 +39,7 @@ static void fetch_data() {
             return;
         }
         default:
-            printf("Unknown Addressing Mode! %d\n", ctx.cur_inst->mode);
+            printf("Unknown Addressing Mode! %d (%02X)\n", ctx.cur_inst->mode, ctx.cur_opcode);
             exit(-7);
             return;
     }
@@ -60,7 +61,7 @@ bool cpu_step() {
         u16 pc = ctx.regs.pc;
         fetch_instruction();
         fetch_data();
-        printf("%04X: %7s (%02X %02X %02X) A: %02X B: %02X C: %02X\n", pc, ctx.cur_inst != NULL ? inst_name(ctx.cur_inst->type) : "UNK", ctx.cur_opcode, bus_read(pc+1), bus_read(pc+2), ctx.regs.a, ctx.regs.b, ctx.regs.c);
+        printf("%04X: %-7s (%02X %02X %02X) A: %02X B: %02X C: %02X\n", pc, inst_name(ctx.cur_inst->type), ctx.cur_opcode, bus_read(pc+1), bus_read(pc+2), ctx.regs.a, ctx.regs.b, ctx.regs.c);
         if(ctx.cur_inst == NULL){
             printf("Unknown Instruction! %02X\n", ctx.cur_opcode);
             exit(-7);

lib/cpu_proc.c

@@ -12,6 +12,30 @@ static void proc_nop(cpu_context *ctx) {
     
 }
 
+void cpu_set_flags(cpu_context *ctx, u8 z, u8 n, u8 h, u8 c){
+    if (z != -1){
+        BIT_SET(ctx->regs.f, 7, z)
+    }
+    if (n != -1){
+        BIT_SET(ctx->regs.f, 6, n)
+    }
+    if (h != -1){
+        BIT_SET(ctx->regs.f, 5, h)
+    }
+    if (c != -1){
+        BIT_SET(ctx->regs.f, 4, c)
+    }
+}
+
+static void proc_xor(cpu_context *ctx) {
+    ctx->regs.a ^= ctx->fetched_data & 0XFF;
+    cpu_set_flags(ctx, ctx->regs.a == 0, 0, 0, 0);
+}
+
+static void proc_di(cpu_context *ctx) {
+    ctx->int_master_enabled = false;
+}
+
 static void proc_ld(cpu_context *ctx) {
     //TODO
 }
@@ -43,6 +67,8 @@ IN_PROC processors[] = {
     [IN_NOP] = proc_nop,
     [IN_LD] = proc_ld,
     [IN_JP] = proc_jp,
+    [IN_DI] = proc_di,
+    [IN_XOR] = proc_xor
 };
 
 IN_PROC inst_get_processor(in_type type) {

lib/instructions.c

@@ -11,13 +11,11 @@ instruction instructions[0x100] = {
     [0xAF] = {IN_XOR, AM_R, RT_A},
 
     [0xC3] = {IN_JP, AM_D16},
+    
+    [0xF3] = {IN_DI},
 };
 
 instruction *instruction_by_opcode(u8 opcode) {
-    if (instructions[opcode].type == IN_NONE) {
-        return NULL;
-    }
-
     return &instructions[opcode];
 }