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working on debug menu

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This commit is contained in:
Samuel Walker
2025-05-30 18:27:31 -06:00
parent bb572cce69
commit 604a6d79f2
10 changed files with 251 additions and 126 deletions
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96
lib/cpu_util.c
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@ -1,66 +1,64 @@
#include <cpu.h>
#include <bus.h>
extern cpu_context ctx;
u16 reverse(u16 n) {
return ((n & 0XFF00) >> 8) | ((n & 0x00FF) << 8);
}
u16 cpu_read_reg(reg_type rt) {
switch(rt) {
case RT_A: return ctx.regs.a;
case RT_F: return ctx.regs.f;
case RT_B: return ctx.regs.b;
case RT_C: return ctx.regs.c;
case RT_D: return ctx.regs.d;
case RT_E: return ctx.regs.e;
case RT_H: return ctx.regs.h;
case RT_L: return ctx.regs.l;
case RT_A: return cpu_get_context()->regs.a;
case RT_F: return cpu_get_context()->regs.f;
case RT_B: return cpu_get_context()->regs.b;
case RT_C: return cpu_get_context()->regs.c;
case RT_D: return cpu_get_context()->regs.d;
case RT_E: return cpu_get_context()->regs.e;
case RT_H: return cpu_get_context()->regs.h;
case RT_L: return cpu_get_context()->regs.l;
case RT_AF: return reverse(*((u16 *)&ctx.regs.a));
case RT_BC: return reverse(*((u16 *)&ctx.regs.b));
case RT_DE: return reverse(*((u16 *)&ctx.regs.d));
case RT_HL: return reverse(*((u16 *)&ctx.regs.h));
case RT_AF: return reverse(*((u16 *)&cpu_get_context()->regs.a));
case RT_BC: return reverse(*((u16 *)&cpu_get_context()->regs.b));
case RT_DE: return reverse(*((u16 *)&cpu_get_context()->regs.d));
case RT_HL: return reverse(*((u16 *)&cpu_get_context()->regs.h));
case RT_PC: return ctx.regs.pc;
case RT_SP: return ctx.regs.sp;
case RT_PC: return cpu_get_context()->regs.pc;
case RT_SP: return cpu_get_context()->regs.sp;
default: return 0;
}
}
void cpu_set_reg(reg_type rt, u16 val) {
switch(rt) {
case RT_A: ctx.regs.a = val & 0XFF; break;
case RT_F: ctx.regs.f = val & 0XFF; break;
case RT_B: ctx.regs.b = val & 0XFF; break;
case RT_C: ctx.regs.c = val & 0XFF; break;
case RT_D: ctx.regs.d = val & 0XFF; break;
case RT_E: ctx.regs.e = val & 0XFF; break;
case RT_H: ctx.regs.h = val & 0XFF; break;
case RT_L: ctx.regs.l = val & 0XFF; break;
case RT_A: cpu_get_context()->regs.a = val & 0XFF; break;
case RT_F: cpu_get_context()->regs.f = val & 0XFF; break;
case RT_B: cpu_get_context()->regs.b = val & 0XFF; break;
case RT_C: cpu_get_context()->regs.c = val & 0XFF; break;
case RT_D: cpu_get_context()->regs.d = val & 0XFF; break;
case RT_E: cpu_get_context()->regs.e = val & 0XFF; break;
case RT_H: cpu_get_context()->regs.h = val & 0XFF; break;
case RT_L: cpu_get_context()->regs.l = val & 0XFF; break;
case RT_AF: *((u16 *)&ctx.regs.a) = reverse(val); break;
case RT_BC: *((u16 *)&ctx.regs.b) = reverse(val); break;
case RT_DE: *((u16 *)&ctx.regs.d) = reverse(val); break;
case RT_HL: *((u16 *)&ctx.regs.h) = reverse(val); break;
case RT_AF: *((u16 *)&cpu_get_context()->regs.a) = reverse(val); break;
case RT_BC: *((u16 *)&cpu_get_context()->regs.b) = reverse(val); break;
case RT_DE: *((u16 *)&cpu_get_context()->regs.d) = reverse(val); break;
case RT_HL: *((u16 *)&cpu_get_context()->regs.h) = reverse(val); break;
case RT_PC: ctx.regs.pc = val; break;
case RT_SP: ctx.regs.sp = val; break;
case RT_PC: cpu_get_context()->regs.pc = val; break;
case RT_SP: cpu_get_context()->regs.sp = val; break;
case RT_NONE: break;
}
}
u8 cpu_read_reg8(reg_type rt) {
switch(rt) {
case RT_A: return ctx.regs.a;
case RT_F: return ctx.regs.f;
case RT_B: return ctx.regs.b;
case RT_C: return ctx.regs.c;
case RT_D: return ctx.regs.d;
case RT_E: return ctx.regs.e;
case RT_H: return ctx.regs.h;
case RT_L: return ctx.regs.l;
case RT_A: return cpu_get_context()->regs.a;
case RT_F: return cpu_get_context()->regs.f;
case RT_B: return cpu_get_context()->regs.b;
case RT_C: return cpu_get_context()->regs.c;
case RT_D: return cpu_get_context()->regs.d;
case RT_E: return cpu_get_context()->regs.e;
case RT_H: return cpu_get_context()->regs.h;
case RT_L: return cpu_get_context()->regs.l;
case RT_HL: {
return bus_read(cpu_read_reg(RT_HL));
@ -73,14 +71,14 @@ u8 cpu_read_reg8(reg_type rt) {
void cpu_set_reg8(reg_type rt, u8 val) {
switch(rt) {
case RT_A: ctx.regs.a = val & 0xFF; break;
case RT_F: ctx.regs.f = val & 0xFF; break;
case RT_B: ctx.regs.b = val & 0xFF; break;
case RT_C: ctx.regs.c = val & 0xFF; break;
case RT_D: ctx.regs.d = val & 0xFF; break;
case RT_E: ctx.regs.e = val & 0xFF; break;
case RT_H: ctx.regs.h = val & 0xFF; break;
case RT_L: ctx.regs.l = val & 0xFF; break;
case RT_A: cpu_get_context()->regs.a = val & 0xFF; break;
case RT_F: cpu_get_context()->regs.f = val & 0xFF; break;
case RT_B: cpu_get_context()->regs.b = val & 0xFF; break;
case RT_C: cpu_get_context()->regs.c = val & 0xFF; break;
case RT_D: cpu_get_context()->regs.d = val & 0xFF; break;
case RT_E: cpu_get_context()->regs.e = val & 0xFF; break;
case RT_H: cpu_get_context()->regs.h = val & 0xFF; break;
case RT_L: cpu_get_context()->regs.l = val & 0xFF; break;
case RT_HL: bus_write(cpu_read_reg(RT_HL), val); break;
@ -91,13 +89,13 @@ void cpu_set_reg8(reg_type rt, u8 val) {
}
cpu_registers *cpu_get_regs() {
return &ctx.regs;
return &cpu_get_context()->regs;
}
u8 cpu_get_int_flags(){
return ctx.int_flags;
return cpu_get_context()->int_flags;
}
void cpu_set_int_flags(u8 value){
ctx.int_flags = value;
cpu_get_context()->int_flags = value;
}