working on dma and add sp timing.

lib/bus.c

@@ -35,7 +35,7 @@ u8 bus_read(u16 address) {
         return wram_read(address);
     } else if (address < 0xFE00) {
         //reserved echo ram...
-        return 0;
+        return wram_read((address & 0x1FFF) | 0xC000);
     } else if (address < 0xFEA0) {
         //OAM
         if(dma_transferring())

lib/dma.c

@@ -1,17 +1,22 @@
 #include <dma.h>
 #include <ppu.h>
 #include <bus.h>
+#include <cart.h>
+#include <ppu.h>
+#include <ram.h>
 
 static dma_context ctx;
 
 void dma_start(u8 start) {
     ctx.active = true;
     ctx.byte = 0;
-    ctx.start_delay = 0;
+    ctx.start_delay = 2;
     ctx.value = start;
+    ctx.transferring = false;
 }
 
 void dma_tick() {
+    ctx.transferring = false;
     if (!ctx.active) {
         return;
     }
@@ -20,8 +25,19 @@ void dma_tick() {
         ctx.start_delay--;
         return;
     }
-
-    ppu_oam_write(ctx.byte, bus_read((ctx.value << 8) | ctx.byte));
+    ctx.transferring = true;
+    u8 data = 0;
+    u16 addr = (ctx.value << 8) | ctx.byte;
+    if(ctx.value < 0x80) {
+        data = cart_read(addr);
+    } else if (ctx.value < 0xA0) {
+        data = ppu_vram_read(addr);
+    } else if (ctx.value < 0xC0) {
+        data = cart_read(addr);
+    } else {
+        data = wram_read((addr & 0x1FFF) | 0xC000);
+    }
+    ppu_oam_write(ctx.byte, data);
 
     ctx.byte++;
 
@@ -29,7 +45,7 @@ void dma_tick() {
 }
 
 bool dma_transferring() {
-    return ctx.active;
+    return ctx.transferring && ctx.active;
 }
 
 void dma_save_state(dma_state* state) {