working on dma and add sp timing.

2025-05-30 15:54:52 -06:00
parent 1a2fac899d
commit bb572cce69
3 changed files with 22 additions and 5 deletions
--- a/lib/bus.c
+++ b/lib/bus.c
@ -35,7 +35,7 @@ u8 bus_read(u16 address) {
        return wram_read(address);
    } else if (address < 0xFE00) {
        //reserved echo ram...
-        return 0;
+        return wram_read((address & 0x1FFF) | 0xC000);
    } else if (address < 0xFEA0) {
        //OAM
        if(dma_transferring())