Initial cpu and instruction parsing

include/cart.h

@@ -21,4 +21,7 @@ typedef struct {
 
 bool cart_load(char *cart);
 
-rom_header *get_rom_header();
+rom_header *get_rom_header();
+
+u8 cart_read(u16 address);
+void cart_write(u16 address, u8 value);

include/common.h

@@ -14,4 +14,6 @@ typedef uint64_t u64;
 #define BIT_SET(a, n, on) (on ? (a) |= (1 << n) : (a) &= !(1 << n))
 #define BETWEEN(a, b, c) ((a >= b) && (a <= c))
 
-void delay(u32 ms);
+void delay(u32 ms);
+
+#define NO_IMPL { fprintf(stderr, "NOT YET IMPLEMENTED\n"); exit(-5); }

include/cpu.h

@@ -1,6 +1,34 @@
 #pragma once
 
 #include <common.h>
+#include <instructions.h>
+
+typedef struct {
+    u8 a;
+    u8 f;
+    u8 b;
+    u8 c;
+    u8 d;
+    u8 e;
+    u8 h;
+    u8 l;
+    u16 pc;
+    u16 sp;
+} cpu_registers;
+
+typedef struct {
+    cpu_registers regs;
+
+    //current fetch...
+    u16 fetched_data;
+    u16 mem_dest;
+    bool dest_is_mem;
+    u8 cur_opcode;
+    instruction *cur_inst;
+
+    bool halted;
+    bool stepping;
+} cpu_context;
 
 void cpu_init();
 bool cpu_step();

include/emu.h

@@ -9,4 +9,6 @@ typedef struct {
 } emu_context;
 
 int emu_run(int, char**);
-emu_context *emu_get_context();
+emu_context *emu_get_context();
+
+void emu_cycles(int cpu_cycles);

include/instructions.h

@@ -0,0 +1,111 @@
+#pragma once
+#include <common.h>
+
+typedef enum {
+    AM_R_D16,
+    AM_R_R,
+    AM_MR_R,
+    AM_R,
+    AM_R_D8,
+    AM_R_MR,
+    AM_R_HLI,
+    AM_R_HLD,
+    AM_HLI_R,
+    AM_HLD_R,
+    AM_R_A8,
+    AM_A8_R,
+    AM_HL_SPR,
+    AM_D16,
+    AM_D8,
+    AM_IMP,
+    AM_D16_R,
+    AM_MR_D8,
+    AM_MR,
+    AM_A16_R,
+    AM_R_A16
+} addr_mode;
+
+typedef enum {
+    RT_NONE,
+    RT_A,
+    RT_F,
+    RT_B,
+    RT_C,
+    RT_D,
+    RT_E,
+    RT_H,
+    RT_L,
+    RT_AF,
+    RT_BC,
+    RT_DE,
+    RT_HL,
+    RT_SP,
+    RT_PC
+} reg_type;
+
+typedef enum {
+    IN_NONE,
+    IN_NOP,
+    IN_LD,
+    IN_INC,
+    IN_DEC,
+    IN_RLCA,
+    IN_ADD,
+    IN_RRCA,
+    IN_STOP,
+    IN_RLA,
+    IN_JR,
+    IN_RRA,
+    IN_DAA,
+    IN_CPL,
+    IN_SCF,
+    IN_CCF,
+    IN_HALT,
+    IN_ADC,
+    IN_SUB,
+    IN_SBC,
+    IN_AND,
+    IN_XOR,
+    IN_OR,
+    IN_CP,
+    IN_POP,
+    IN_JP,
+    IN_PUSH,
+    IN_RET,
+    IN_CB,
+    IN_CALL,
+    IN_RETI,
+    IN_LDH,
+    IN_JPHL,
+    IN_DI,
+    IN_EI,
+    IN_RST,
+    IN_ERR,
+    //CB instructions...
+    IN_RCL,
+    IN_RRC,
+    IN_RL,
+    IN_RR,
+    IN_SLA,
+    IN_SRA,
+    IN_SWAP,
+    IN_SRL,
+    IN_BIT,
+    IN_RES,
+    IN_SET
+} in_type;
+
+typedef enum {
+    CT_NONE, CT_NZ, CT_Z, CT_NC, CT_C
+} cond_type;
+
+typedef struct {
+    in_type type;
+    addr_mode mode;
+    reg_type reg_1;
+    reg_type reg_2;
+    cond_type cond;
+    u8 param;
+} instruction;
+
+instruction *instruction_by_opcode(u8 opcode);