#include <cpu.h>
#include <bus.h>

u16 reverse(u16 n) {
    return ((n & 0XFF00) >> 8) | ((n & 0x00FF) << 8);
}

u16 cpu_read_reg(reg_type rt) {
    switch(rt) {
        case RT_A: return cpu_get_context()->regs.a;
        case RT_F: return cpu_get_context()->regs.f;
        case RT_B: return cpu_get_context()->regs.b;
        case RT_C: return cpu_get_context()->regs.c;
        case RT_D: return cpu_get_context()->regs.d;
        case RT_E: return cpu_get_context()->regs.e;
        case RT_H: return cpu_get_context()->regs.h;
        case RT_L: return cpu_get_context()->regs.l;

        case RT_AF: return reverse(*((u16 *)&cpu_get_context()->regs.a));
        case RT_BC: return reverse(*((u16 *)&cpu_get_context()->regs.b));
        case RT_DE: return reverse(*((u16 *)&cpu_get_context()->regs.d));
        case RT_HL: return reverse(*((u16 *)&cpu_get_context()->regs.h));

        case RT_PC: return cpu_get_context()->regs.pc;
        case RT_SP: return cpu_get_context()->regs.sp;
        default: return 0;
    }
}

void cpu_set_reg(reg_type rt, u16 val) {
    switch(rt) {
        case RT_A: cpu_get_context()->regs.a = val & 0XFF; break;
        case RT_F: cpu_get_context()->regs.f = val & 0XFF; break;
        case RT_B: cpu_get_context()->regs.b = val & 0XFF; break;
        case RT_C: cpu_get_context()->regs.c = val & 0XFF; break;
        case RT_D: cpu_get_context()->regs.d = val & 0XFF; break;
        case RT_E: cpu_get_context()->regs.e = val & 0XFF; break;
        case RT_H: cpu_get_context()->regs.h = val & 0XFF; break;
        case RT_L: cpu_get_context()->regs.l = val & 0XFF; break;

        case RT_AF: *((u16 *)&cpu_get_context()->regs.a) = reverse(val); break;
        case RT_BC: *((u16 *)&cpu_get_context()->regs.b) = reverse(val); break;
        case RT_DE: *((u16 *)&cpu_get_context()->regs.d) = reverse(val); break;
        case RT_HL: *((u16 *)&cpu_get_context()->regs.h) = reverse(val); break;

        case RT_PC: cpu_get_context()->regs.pc = val; break;
        case RT_SP: cpu_get_context()->regs.sp = val; break;
        case RT_NONE: break;
    }
}

u8 cpu_read_reg8(reg_type rt) {
    switch(rt) {
        case RT_A: return cpu_get_context()->regs.a;
        case RT_F: return cpu_get_context()->regs.f;
        case RT_B: return cpu_get_context()->regs.b;
        case RT_C: return cpu_get_context()->regs.c;
        case RT_D: return cpu_get_context()->regs.d;
        case RT_E: return cpu_get_context()->regs.e;
        case RT_H: return cpu_get_context()->regs.h;
        case RT_L: return cpu_get_context()->regs.l;

        case RT_HL: {
            return bus_read(cpu_read_reg(RT_HL));
        }
        default:
            printf("**ERR INVALID REG8: %d\n", rt);
            NO_IMPL
    }
}

void cpu_set_reg8(reg_type rt, u8 val) {
    switch(rt) {
        case RT_A: cpu_get_context()->regs.a = val & 0xFF; break;
        case RT_F: cpu_get_context()->regs.f = val & 0xFF; break;
        case RT_B: cpu_get_context()->regs.b = val & 0xFF; break;
        case RT_C: cpu_get_context()->regs.c = val & 0xFF; break;
        case RT_D: cpu_get_context()->regs.d = val & 0xFF; break;
        case RT_E: cpu_get_context()->regs.e = val & 0xFF; break;
        case RT_H: cpu_get_context()->regs.h = val & 0xFF; break;
        case RT_L: cpu_get_context()->regs.l = val & 0xFF; break;

        case RT_HL: bus_write(cpu_read_reg(RT_HL), val); break;

        default:
            printf("**ERR INVALID REG8: %d\n", rt);
            NO_IMPL
    }
}

cpu_registers *cpu_get_regs() {
    return &cpu_get_context()->regs;
}

u8 cpu_get_int_flags(){
    return cpu_get_context()->int_flags;
}

void cpu_set_int_flags(u8 value){
    cpu_get_context()->int_flags = value;
}