2016-05-16 09:48:40 -06:00
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#include <stdio.h>
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2016-12-03 05:42:27 -07:00
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#include <string.h>
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2016-05-16 09:48:40 -06:00
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#include "NDS.h"
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2016-11-02 18:38:58 -06:00
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#include "ARM.h"
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2016-05-16 09:48:40 -06:00
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namespace NDS
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{
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2016-11-02 18:38:58 -06:00
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ARM* ARM9;
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ARM* ARM7;
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2016-11-24 10:31:49 -07:00
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s32 ARM9Cycles, ARM7Cycles;
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2016-11-02 18:38:58 -06:00
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u8 ARM9BIOS[0x1000];
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u8 ARM7BIOS[0x4000];
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2016-12-03 05:42:27 -07:00
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u8 MainRAM[0x400000];
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u8 ARM7WRAM[0x10000];
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bool Running;
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2016-05-16 09:48:40 -06:00
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void Init()
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{
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2016-11-02 18:38:58 -06:00
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ARM9 = new ARM(0);
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ARM7 = new ARM(1);
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2016-05-16 09:48:40 -06:00
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Reset();
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}
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void Reset()
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{
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FILE* f;
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f = fopen("bios9.bin", "rb");
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if (!f)
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printf("ARM9 BIOS not found\n");
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else
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{
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fseek(f, 0, SEEK_SET);
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fread(ARM9BIOS, 0x1000, 1, f);
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2016-11-02 18:38:58 -06:00
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printf("ARM9 BIOS loaded: %08X\n", ARM9Read32(0xFFFF0000));
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fclose(f);
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}
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2016-11-02 18:38:58 -06:00
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f = fopen("bios7.bin", "rb");
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if (!f)
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printf("ARM7 BIOS not found\n");
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else
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{
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fseek(f, 0, SEEK_SET);
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fread(ARM7BIOS, 0x4000, 1, f);
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printf("ARM7 BIOS loaded: %08X\n", ARM7Read32(0x00000000));
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fclose(f);
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}
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2016-11-24 10:31:49 -07:00
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2016-12-03 05:42:27 -07:00
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memset(MainRAM, 0, 0x400000);
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memset(ARM7WRAM, 0, 0x10000);
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ARM9->Reset();
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ARM7->Reset();
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ARM9Cycles = 0;
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ARM7Cycles = 0;
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Running = true; // hax
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}
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void RunFrame()
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{
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s32 framecycles = 560190<<1;
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// very gross and temp. loop
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while (Running && framecycles>0)
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{
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ARM9Cycles = ARM9->Execute(32 + ARM9Cycles);
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ARM7Cycles = ARM7->Execute(16 + ARM7Cycles);
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framecycles -= 32;
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}
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}
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void Halt()
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{
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Running = false;
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}
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2016-12-02 17:31:33 -07:00
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u8 ARM9Read8(u32 addr)
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{
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if ((addr & 0xFFFFF000) == 0xFFFF0000)
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{
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return *(u8*)&ARM9BIOS[addr & 0xFFF];
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}
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2016-12-03 05:42:27 -07:00
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switch (addr & 0xFF000000)
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{
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case 0x02000000:
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return *(u8*)&MainRAM[addr & 0x3FFFFF];
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}
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2016-12-02 17:31:33 -07:00
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printf("unknown arm9 read8 %08X\n", addr);
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return 0;
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}
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u16 ARM9Read16(u32 addr)
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{
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if ((addr & 0xFFFFF000) == 0xFFFF0000)
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{
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return *(u16*)&ARM9BIOS[addr & 0xFFF];
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}
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2016-12-03 05:42:27 -07:00
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switch (addr & 0xFF000000)
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{
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case 0x02000000:
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return *(u16*)&MainRAM[addr & 0x3FFFFF];
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}
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2016-12-02 17:31:33 -07:00
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printf("unknown arm9 read16 %08X\n", addr);
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return 0;
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}
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2016-11-02 18:38:58 -06:00
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2016-12-02 17:31:33 -07:00
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u32 ARM9Read32(u32 addr)
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{
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2016-11-02 18:38:58 -06:00
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if ((addr & 0xFFFFF000) == 0xFFFF0000)
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{
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return *(u32*)&ARM9BIOS[addr & 0xFFF];
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}
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2016-12-03 05:42:27 -07:00
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switch (addr & 0xFF000000)
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{
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case 0x02000000:
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return *(u32*)&MainRAM[addr & 0x3FFFFF];
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}
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2016-11-02 18:38:58 -06:00
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printf("unknown arm9 read32 %08X\n", addr);
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return 0;
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2016-05-16 09:48:40 -06:00
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}
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2016-12-02 17:31:33 -07:00
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void ARM9Write8(u32 addr, u8 val)
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{
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2016-12-03 05:42:27 -07:00
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switch (addr & 0xFF000000)
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{
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case 0x02000000:
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*(u8*)&MainRAM[addr & 0x3FFFFF] = val;
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return;
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}
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2016-12-02 17:31:33 -07:00
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printf("unknown arm9 write8 %08X %02X\n", addr, val);
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}
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void ARM9Write16(u32 addr, u16 val)
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{
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switch (addr & 0xFF000000)
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{
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case 0x02000000:
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*(u16*)&MainRAM[addr & 0x3FFFFF] = val;
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return;
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}
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2016-12-02 17:31:33 -07:00
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printf("unknown arm9 write16 %08X %04X\n", addr, val);
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}
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void ARM9Write32(u32 addr, u32 val)
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{
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switch (addr & 0xFF000000)
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{
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case 0x02000000:
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*(u32*)&MainRAM[addr & 0x3FFFFF] = val;
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return;
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}
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2016-12-02 17:31:33 -07:00
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printf("unknown arm9 write32 %08X %08X\n", addr, val);
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}
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u8 ARM7Read8(u32 addr)
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{
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if (addr < 0x00004000)
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{
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return *(u8*)&ARM7BIOS[addr];
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}
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2016-12-03 05:42:27 -07:00
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switch (addr & 0xFF800000)
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{
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case 0x02000000:
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return *(u8*)&MainRAM[addr & 0x3FFFFF];
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case 0x03800000:
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return *(u8*)&ARM7WRAM[addr & 0xFFFF];
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}
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2016-12-02 17:31:33 -07:00
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printf("unknown arm7 read8 %08X\n", addr);
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return 0;
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}
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u16 ARM7Read16(u32 addr)
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{
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if (addr < 0x00004000)
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{
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return *(u16*)&ARM7BIOS[addr];
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}
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2016-12-03 05:42:27 -07:00
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switch (addr & 0xFF800000)
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{
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case 0x02000000:
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return *(u16*)&MainRAM[addr & 0x3FFFFF];
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case 0x03800000:
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return *(u16*)&ARM7WRAM[addr & 0xFFFF];
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}
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2016-12-02 17:31:33 -07:00
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printf("unknown arm7 read16 %08X\n", addr);
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return 0;
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}
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2016-11-02 18:38:58 -06:00
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u32 ARM7Read32(u32 addr)
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{
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if (addr < 0x00004000)
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{
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return *(u32*)&ARM7BIOS[addr];
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}
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2016-12-03 05:42:27 -07:00
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switch (addr & 0xFF800000)
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{
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case 0x02000000:
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return *(u32*)&MainRAM[addr & 0x3FFFFF];
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case 0x03800000:
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return *(u32*)&ARM7WRAM[addr & 0xFFFF];
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}
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2016-11-02 18:38:58 -06:00
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printf("unknown arm7 read32 %08X\n", addr);
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return 0;
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}
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2016-05-16 09:48:40 -06:00
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2016-12-02 17:31:33 -07:00
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void ARM7Write8(u32 addr, u8 val)
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{
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2016-12-03 05:42:27 -07:00
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switch (addr & 0xFF800000)
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{
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case 0x02000000:
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*(u8*)&MainRAM[addr & 0x3FFFFF] = val;
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return;
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case 0x03800000:
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*(u8*)&ARM7WRAM[addr & 0xFFFF] = val;
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return;
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}
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2016-12-02 17:31:33 -07:00
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printf("unknown arm7 write8 %08X %02X\n", addr, val);
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}
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void ARM7Write16(u32 addr, u16 val)
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{
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2016-12-03 05:42:27 -07:00
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switch (addr & 0xFF800000)
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{
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case 0x02000000:
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*(u16*)&MainRAM[addr & 0x3FFFFF] = val;
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return;
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case 0x03800000:
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*(u16*)&ARM7WRAM[addr & 0xFFFF] = val;
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return;
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}
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2016-12-02 17:31:33 -07:00
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printf("unknown arm7 write16 %08X %04X\n", addr, val);
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2016-05-16 09:48:40 -06:00
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}
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2016-12-02 17:31:33 -07:00
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void ARM7Write32(u32 addr, u32 val)
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2016-05-16 09:48:40 -06:00
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{
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2016-12-03 05:42:27 -07:00
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switch (addr & 0xFF800000)
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{
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case 0x02000000:
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*(u32*)&MainRAM[addr & 0x3FFFFF] = val;
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return;
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case 0x03800000:
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*(u32*)&ARM7WRAM[addr & 0xFFFF] = val;
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return;
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}
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2016-12-02 17:31:33 -07:00
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printf("unknown arm7 write32 %08X %08X\n", addr, val);
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2016-05-16 09:48:40 -06:00
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}
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}
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