mirror of
https://github.com/melonDS-emu/melonDS.git
synced 2025-07-26 07:39:56 -06:00
revert the *entire* interlock implemention
too slow, not accurate enough. we need to do a *lot* more research into the specifics of how this works with all the various aspects of the cpu's timings before we can make a good implementation
This commit is contained in:
88
src/ARM.h
88
src/ARM.h
@ -30,8 +30,6 @@
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#include "debug/GdbStub.h"
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#endif
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//#define INTERLOCK
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namespace melonDS
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{
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inline u32 ROR(u32 x, u32 n)
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@ -148,46 +146,6 @@ public:
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virtual void AddCycles_CD_STR() = 0;
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virtual void AddCycles_CD_STM() = 0;
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/*
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inline void AddCycles_L(const u32 delay, const u32 reg1)
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{
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if (InterlockTimestamp[reg1] > Timestamp() + delay);
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Timestamp() = InterlockTimestamp[reg1];
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}
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inline void AddCycles_L(const u32 delay, const u32 reg1, const u32 reg2)
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{
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u64 cycles = std::max(InterlockTimestamp[reg1], InterlockTimestamp[reg2]);
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if (cycles > Timestamp() + delay)
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Timestamp() = cycles;
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}
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inline void AddCycles_L(const u32 delay, const u32 reg1, const u32 reg2, const u32 reg3)
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{
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u64 cycles = std::max(InterlockTimestamp[reg1], std::max(InterlockTimestamp[reg2], InterlockTimestamp[reg3]));
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if (cycles > Timestamp() + delay)
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Timestamp() = cycles;
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}*/
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#ifdef INTERLOCK
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// fetch the value of a register while handling any interlock cycles
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virtual inline u32 GetReg(const u32 reg, const u32 delay = 0) = 0;
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// Must be called after all of an instruction's cycles are calculated!!!
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virtual inline void SetCycles_L(const u32 reg, const u32 cycles, const u32 type) = 0;
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#else
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// fetch the value of a register while handling any interlock cycles
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inline u32 GetReg(const u32 reg, const u32 delay = 0)
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{
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return R[reg];
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}
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// Must be called after all of an instruction's cycles are calculated!!!
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inline void SetCycles_L(const u32 reg, const u32 cycles, const u32 type) {}
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#endif
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virtual u64& Timestamp() = 0;
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void CheckGdbIncoming();
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u32 Num;
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@ -224,15 +182,6 @@ public:
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MemRegion CodeMem;
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enum InterlockType
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{
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ILT_Norm = 0,
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ILT_Mul = 1,
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};
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u8 InterlockType[16];
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u64 InterlockTimestamp[16];
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#ifdef JIT_ENABLED
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u32 FastBlockLookupStart, FastBlockLookupSize;
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u64* FastBlockLookup;
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@ -318,14 +267,14 @@ public:
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{
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// code only. always nonseq 32-bit for ARM9.
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s32 numC = CodeCycles;
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Cycles += std::max(numC, CyclesILed + 1);
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Cycles += numC;
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}
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void AddCycles_CI(s32 numI) override
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{
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// code+internal
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s32 numC = CodeCycles;
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numI += 1 + CyclesILed;
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numI += 1;
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Cycles += std::max(numC, numI);
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}
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@ -334,25 +283,6 @@ public:
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void AddCycles_CDI_SWP() override { AddCycles_CD_STR(); } // uses the same behavior as str
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void AddCycles_CD_STR() override;
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void AddCycles_CD_STM() override;
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#ifdef INTERLOCK
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// fetch the value of a register while handling any interlock cycles
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inline u32 GetReg(const u32 reg, const u32 delay = 0) override
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{
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if (InterlockTimestamp[reg] > (Timestamp() + delay))
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CyclesILed = InterlockTimestamp[reg] - (Timestamp() + delay);
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return R[reg];
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}
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// Must be called after all of an instruction's cycles are calculated!!!
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inline void SetCycles_L(const u32 reg, const u32 cycles, const u32 type) override
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{
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InterlockTimestamp[reg] = cycles + Timestamp() + Cycles;
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//InterlockType[reg] = type;
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}
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#endif
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u64& Timestamp() override;
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void GetCodeMemRegion(u32 addr, MemRegion* region);
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@ -417,8 +347,6 @@ public:
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bool (*GetMemRegion)(u32 addr, bool write, MemRegion* region);
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s32 CyclesILed;
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#ifdef GDBSTUB_ENABLED
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u32 ReadMem(u32 addr, int size) override;
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void WriteMem(u32 addr, int size, u32 v) override;
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@ -476,18 +404,6 @@ public:
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void AddCycles_CD_STR() override { AddCycles_CD(); }
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void AddCycles_CD_STM() override { AddCycles_CD(); }
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#ifdef INTERLOCK
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// fetch the value of a register while handling any interlock cycles
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inline u32 GetReg(const u32 reg, const u32 delay = 0) override
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{
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return R[reg];
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}
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// Must be called after all of an instruction's cycles are calculated!!!
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inline void SetCycles_L(const u32 reg, const u32 cycles, const u32 type) override{}
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#endif
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u64& Timestamp() override;
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protected:
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u8 BusRead8(u32 addr) override;
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u16 BusRead16(u32 addr) override;
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