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https://github.com/melonDS-emu/melonDS.git
synced 2025-07-27 00:00:07 -06:00
revert the *entire* interlock implemention
too slow, not accurate enough. we need to do a *lot* more research into the specifics of how this works with all the various aspects of the cpu's timings before we can make a good implementation
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@ -163,7 +163,7 @@ void A_MSR_REG(ARM* cpu)
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if ((cpu->CPSR & 0x1F) == 0x10) mask &= 0xFFFFFF00;
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u32 val = cpu->GetReg(cpu->CurInstr & 0xF, 1);
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u32 val = cpu->R[cpu->CurInstr & 0xF];
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// bit4 is forced to 1
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val |= 0x00000010;
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@ -216,7 +216,7 @@ void A_MCR(ARM* cpu)
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u32 cn = (cpu->CurInstr >> 16) & 0xF;
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u32 cm = cpu->CurInstr & 0xF;
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u32 cpinfo = (cpu->CurInstr >> 5) & 0x7;
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u32 val = cpu->GetReg((cpu->CurInstr>>12)&0xF);
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u32 val = cpu->R[(cpu->CurInstr>>12)&0xF];
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if (((cpu->CurInstr>>12) & 0xF) == 15) val += 4;
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if (cpu->Num==0 && cp==15)
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